0b0c47fddd
Sub 655 root causes (confirmed from log analysis): 1. protocol.py: max_completion_tokens never folded into max_tokens → 162/881 replay requests rejected 400 (extra_forbidden) 2. max_num_seqs=1 → t2_n_2 test fails (needs n=2) 3. max_model_len=131072 → OOM crash at 62% replay, opencompass all 0 Fixes: - protocol.py: model_validator fold_max_completion_tokens - yaml: max_num_seqs=2, max_model_len=80000, PYTORCH_CUDA_ALLOC_CONF - topk_softmax stays =0 (corex CUB BlockReduce incompatible on BI-V100) xllm_latest import to ex_engine/: - npu_torch layers: GDN(1164L), Qwen3.5 GDN, attention, fused_moe - cuda/moe kernels: topk_softmax_kernels.cuh, moe_combine, moe_compute_index - npu kernels: causal_conv1d, recurrent_gated_delta_rule - model headers: qwen3_5.h, qwen3_next.h
60 lines
2.3 KiB
C++
60 lines
2.3 KiB
C++
/* Copyright 2026 The xLLM Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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https://github.com/jd-opensource/xllm/blob/main/LICENSE
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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==============================================================================*/
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#include "core/kernels/npu/aclnn/pytorch_npu_helper.hpp"
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#include "core/kernels/npu/utils.h"
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#include "core/kernels/npu/xllm_ops/xllm_ops_api.h"
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namespace xllm::kernel::npu {
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torch::Tensor causal_conv1d(const torch::Tensor& x,
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const torch::Tensor& weight,
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const torch::Tensor& conv_state,
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const std::optional<torch::Tensor>& bias_opt,
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const torch::IntArrayRef query_start_loc_opt,
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const torch::IntArrayRef cache_indices_opt,
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const torch::IntArrayRef initial_state_mode_opt,
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const torch::IntArrayRef num_accepted_tokens_opt,
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int64_t activation_mode,
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int64_t pad_slot_id,
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int64_t run_mode) {
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check_tensor(x, "x", "causal_conv1d");
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check_tensor(weight, "weight", "causal_conv1d");
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check_tensor(conv_state, "conv_state", "causal_conv1d");
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c10::optional<torch::Tensor> bias_tensor = c10::nullopt;
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if (bias_opt.has_value() && bias_opt.value().defined()) {
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bias_tensor = bias_opt.value();
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}
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torch::Tensor output = torch::empty(x.sizes(), x.options());
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EXEC_NPU_CMD(aclnnCausalConv1d,
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x,
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weight,
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bias_tensor,
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conv_state,
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query_start_loc_opt,
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cache_indices_opt,
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initial_state_mode_opt,
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num_accepted_tokens_opt,
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activation_mode,
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pad_slot_id,
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run_mode,
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output);
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return output;
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}
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} // namespace xllm::kernel::npu
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