8d75652949
Sources cloned and tree'd (no --depth):
- jd-opensource/xllm: ILU kernels, CUDA kernels, MoE kernels
- NVIDIA/cccl: CUB tuning/dispatch headers (block-level primitives)
- fla-org/flash-linear-attention: Triton GDN kernels
- NVIDIA/cutlass: grouped GEMM reference (read, not copied)
- Dao-AILab/flash-attention: attention kernel reference (SM80+, read only)
New CUDA kernels (from xllm, SM-agnostic, portable to BI-V100):
ex_engine/xllm_kernels/cuda/activation.cu (188 lines) — silu_and_mul, gelu
ex_engine/xllm_kernels/cuda/norm.cu (600 lines) — rms_norm, fused_add_rms_norm
ex_engine/xllm_kernels/cuda/rope.cu (258 lines) — rotary_embedding
ex_engine/xllm_kernels/cuda/block_copy.cu (209 lines) — copy_blocks, swap_blocks
ex_engine/xllm_kernels/cuda/reshape_paged_cache.cu (101 lines) — KV cache ops
ex_engine/xllm_kernels/cuda/headers/ (5 headers for compilation)
ILU bridge kernel sources (from xllm, verified SAME as upstream):
ex_engine/xllm_kernels/ilu/ (10 files, 925 lines total)
— activation.cpp, attention.cpp, fused_moe.cpp, group_gemm.cpp,
matmul.cpp, norm.cpp, rope.cpp, ilu_ops_api.h, ixformer.h, utils.h
FLA Triton GDN kernels (for GatedDeltaNet without SM90+ FlashQLA):
ex_engine/fla_kernels/gated_delta_rule/ (7 files, 2370 lines)
— chunk_fwd.py (428), chunk.py (487), wy_fast.py (409),
fused_recurrent.py (392), naive.py (161), gate.py (380)
CCCL sync (12 tuning + 14 dispatch headers updated from NVIDIA/cccl):
cccl_upstream/cub/cub/device/dispatch/tuning/ — 12 changed files synced
cccl_upstream/cub/cub/device/dispatch/ — 14 changed dispatch files synced
Compilation targets for real machine (ivcore10):
1. CUDA kernels: --cuda-gpu-arch=ivcore10 via corex clang/16
2. ILU bridges: torch.utils.cpp_extension linking ixformer .so
3. FLA kernels: Triton JIT (if Triton works on BI-V100)
63 lines
3.0 KiB
C++
63 lines
3.0 KiB
C++
/* Copyright 2025-2026 The xLLM Authors.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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https://github.com/jd-opensource/xllm/blob/main/LICENSE
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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==============================================================================*/
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#pragma once
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namespace xllm::kernel::ilu {
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#undef check_tensor_contiguous
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#define check_tensor_contiguous(x, type) \
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TORCH_CHECK(x.scalar_type() == type); \
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TORCH_CHECK(x.is_cuda()); \
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TORCH_CHECK(x.is_contiguous());
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#undef check_tensor_half_bf_float
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#define check_tensor_half_bf_float(x) \
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TORCH_CHECK(x.scalar_type() == at::ScalarType::Half || \
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x.scalar_type() == at::ScalarType::Float || \
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x.scalar_type() == at::ScalarType::BFloat16); \
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TORCH_CHECK(x.is_cuda());
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// from torchCheckMsgImpl
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inline const char* ixformer_check_msg_impl(const char* msg) { return msg; }
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// // If there is just 1 user-provided C-string argument, use it.
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#define IXFORMER_CHECK_MSG(cond, type, ...) \
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(ixformer_check_msg_impl( \
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"Expected " #cond \
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" to be true, but got false. " \
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"(Could this error message be improved? If so, " \
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"please report an enhancement request to ixformer.)", \
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##__VA_ARGS__))
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#define IXFORMER_CHECK(cond, ...) \
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{ \
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if (!(cond)) { \
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std::cerr << __FILE__ << " (" << __LINE__ << ")" \
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<< "-" << __FUNCTION__ << " : " \
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<< IXFORMER_CHECK_MSG(cond, "", ##__VA_ARGS__) << std::endl; \
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throw std::runtime_error("IXFORMER_CHECK ERROR"); \
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} \
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}
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#undef CUINFER_CHECK
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#define CUINFER_CHECK(func) \
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do { \
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cuinferStatus_t status = (func); \
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if (status != CUINFER_STATUS_SUCCESS) { \
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std::cerr << "Error in file " << __FILE__ << " on line " << __LINE__ \
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<< ": " << cuinferGetErrorString(status) << std::endl; \
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throw std::runtime_error("CUINFER_CHECK ERROR"); \
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} \
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} while (0)
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} // namespace xllm::kernel::ilu
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