56fd68e7dd
CCCL (CUDA C++ Core Libraries) provides: - CUB: device/block/warp-level GPU primitives (reduce, scan, sort, topk) - Thrust: high-level parallel algorithms (transform_reduce, sort, scan) - libcudacxx: CUDA C++ standard library (atomics, barriers, memory) - cudax: experimental features (memory resources, allocators) - Tuning policies: per-SM hardware-specific algorithm parameters Competition optimization vectors mapped to CCCL: - Output TPS (83% weight): warp_reduce, block_reduce, device_topk - Input TPS (14% weight): device_scan, block_load, prefetch - Cache TPS (3% weight): prefix caching strategy patterns - Memory (0.9 util): pooled/cached/buddy allocators Source: https://github.com/NVIDIA/cccl (shallow clone, HEAD only) License: Apache-2.0
61 lines
2.1 KiB
Plaintext
61 lines
2.1 KiB
Plaintext
// SPDX-FileCopyrightText: Copyright (c) 2011-2023, NVIDIA CORPORATION. All rights reserved.
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// SPDX-License-Identifier: BSD-3
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#include <thrust/device_vector.h>
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#include <thrust/execution_policy.h>
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#include <thrust/reduce.h>
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#include <thrust/unique.h>
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#include "nvbench_helper.cuh"
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template <class KeyT, class ValueT>
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static void basic(nvbench::state& state, nvbench::type_list<KeyT, ValueT>)
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{
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const auto elements = static_cast<std::size_t>(state.get_int64("Elements"));
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constexpr std::size_t min_segment_size = 1;
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const std::size_t max_segment_size = static_cast<std::size_t>(state.get_int64("MaxSegSize"));
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thrust::device_vector<KeyT> in_keys = generate.uniform.key_segments(elements, min_segment_size, max_segment_size);
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thrust::device_vector<KeyT> out_keys = in_keys;
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thrust::device_vector<ValueT> in_vals(elements);
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const std::size_t unique_keys =
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::cuda::std::distance(out_keys.begin(), thrust::unique(out_keys.begin(), out_keys.end()));
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thrust::device_vector<ValueT> out_vals(unique_keys);
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state.add_element_count(elements);
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state.add_global_memory_reads<KeyT>(elements);
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state.add_global_memory_reads<ValueT>(elements);
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state.add_global_memory_writes<KeyT>(unique_keys);
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state.add_global_memory_writes<ValueT>(unique_keys);
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caching_allocator_t alloc;
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state.exec(
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nvbench::exec_tag::gpu | nvbench::exec_tag::no_batch | nvbench::exec_tag::sync, [&](nvbench::launch& launch) {
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thrust::reduce_by_key(
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policy(alloc, launch), in_keys.begin(), in_keys.end(), in_vals.begin(), out_keys.begin(), out_vals.begin());
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});
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}
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using key_types =
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nvbench::type_list<int8_t,
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int16_t,
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int32_t,
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int64_t
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#if _CCCL_HAS_INT128()
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,
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int128_t
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#endif
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>;
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using value_types = all_types;
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NVBENCH_BENCH_TYPES(basic, NVBENCH_TYPE_AXES(key_types, value_types))
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.set_name("base")
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.set_type_axes_names({"KeyT{ct}", "ValueT{ct}"})
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.add_int64_power_of_two_axis("Elements", nvbench::range(16, 28, 4))
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.add_int64_power_of_two_axis("MaxSegSize", {1, 4, 8});
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