56fd68e7dd
CCCL (CUDA C++ Core Libraries) provides: - CUB: device/block/warp-level GPU primitives (reduce, scan, sort, topk) - Thrust: high-level parallel algorithms (transform_reduce, sort, scan) - libcudacxx: CUDA C++ standard library (atomics, barriers, memory) - cudax: experimental features (memory resources, allocators) - Tuning policies: per-SM hardware-specific algorithm parameters Competition optimization vectors mapped to CCCL: - Output TPS (83% weight): warp_reduce, block_reduce, device_topk - Input TPS (14% weight): device_scan, block_load, prefetch - Cache TPS (3% weight): prefix caching strategy patterns - Memory (0.9 util): pooled/cached/buddy allocators Source: https://github.com/NVIDIA/cccl (shallow clone, HEAD only) License: Apache-2.0
132 lines
5.3 KiB
C++
132 lines
5.3 KiB
C++
// -*- C++ -*-
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//===----------------------------------------------------------------------===//
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//
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// Part of libcu++, the C++ Standard Library for your entire system,
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// under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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// SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
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//
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//===----------------------------------------------------------------------===//
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#ifndef _CUDA_PTX
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#define _CUDA_PTX
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#include <cuda/std/detail/__config>
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#if defined(_CCCL_IMPLICIT_SYSTEM_HEADER_GCC)
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# pragma GCC system_header
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#elif defined(_CCCL_IMPLICIT_SYSTEM_HEADER_CLANG)
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# pragma clang system_header
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#elif defined(_CCCL_IMPLICIT_SYSTEM_HEADER_MSVC)
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# pragma system_header
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#endif // no system header
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/*
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* The cuda::ptx namespace intends to provide PTX wrappers for new hardware
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* features and new PTX instructions so that they can be experimented with
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* before higher-level C++ APIs are designed and developed.
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*
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* The wrappers have the following responsibilities:
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*
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* - They must prevent any PTX assembler errors, that is:
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* - They are defined only for versions of the CUDA Toolkit in which nvcc/ptxas
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* actually recognizes the instruction.
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* - Sizes and types of parameters are correct.
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* - They must convert state spaces correctly.
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* - They adhere to the libcu++ coding standards of using:
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* - Reserved identifiers for all parameters, variables. E.g. `__meow` or `_Woof`
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* - ::cuda::std:: namespace for types
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*
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* The wrappers should not do the following:
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*
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* - Use any non-native types. For example, an mbarrier instruction wrapper
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* takes the barrier address as a uint64_t pointer.
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*
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* This header is intended for:
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*
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* - internal consumption by higher-level APIs such as cuda::barrier,
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* - outside developers who want to experiment with the latest features of the
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* hardware.
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*
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* Stability:
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*
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* - These headers are intended to present a stable API (not ABI) within one
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* major version of the CTK. This means that:
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* - All functions are marked inline
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* - The type of a function parameter can be changed to be more generic if
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* that means that code that called the original version can still be
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* compiled.
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*
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* - Good exposure of the PTX should be high priority. If, at a new major
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* version, we face a difficult choice between breaking backward-compatibility
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* and an improvement of the PTX exposure, we will tend to the latter option
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* more easily than in other parts of libcu++.
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*
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* Code organization:
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*
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* - Each instruction is in a separate file and is included below.
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* - Some helper function and types can be found in ptx/ptx_helper_functions.h and ptx/ptx_dot_variants.h.
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*/
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#include <cuda/__ptx/instructions/barrier_cluster.h>
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#include <cuda/__ptx/instructions/bfind.h>
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#include <cuda/__ptx/instructions/bmsk.h>
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#include <cuda/__ptx/instructions/clusterlaunchcontrol.h>
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#include <cuda/__ptx/instructions/cp_async_bulk.h>
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#include <cuda/__ptx/instructions/cp_async_bulk_commit_group.h>
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#include <cuda/__ptx/instructions/cp_async_bulk_tensor.h>
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#include <cuda/__ptx/instructions/cp_async_bulk_wait_group.h>
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#include <cuda/__ptx/instructions/cp_async_mbarrier_arrive.h>
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#include <cuda/__ptx/instructions/cp_reduce_async_bulk.h>
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#include <cuda/__ptx/instructions/cp_reduce_async_bulk_tensor.h>
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#include <cuda/__ptx/instructions/elect_sync.h>
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#include <cuda/__ptx/instructions/exit.h>
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#include <cuda/__ptx/instructions/fence.h>
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#include <cuda/__ptx/instructions/get_sreg.h>
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#include <cuda/__ptx/instructions/getctarank.h>
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#include <cuda/__ptx/instructions/ld.h>
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#include <cuda/__ptx/instructions/mbarrier_arrive.h>
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#include <cuda/__ptx/instructions/mbarrier_expect_tx.h>
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#include <cuda/__ptx/instructions/mbarrier_init.h>
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#include <cuda/__ptx/instructions/mbarrier_inval.h>
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#include <cuda/__ptx/instructions/mbarrier_wait.h>
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#include <cuda/__ptx/instructions/multimem_ld_reduce.h>
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#include <cuda/__ptx/instructions/multimem_red.h>
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#include <cuda/__ptx/instructions/multimem_st.h>
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#include <cuda/__ptx/instructions/prmt.h>
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#include <cuda/__ptx/instructions/red_async.h>
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#include <cuda/__ptx/instructions/setmaxnreg.h>
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#include <cuda/__ptx/instructions/shfl_sync.h>
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#include <cuda/__ptx/instructions/shl.h>
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#include <cuda/__ptx/instructions/shr.h>
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#include <cuda/__ptx/instructions/st.h>
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#include <cuda/__ptx/instructions/st_async.h>
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#include <cuda/__ptx/instructions/st_bulk.h>
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#include <cuda/__ptx/instructions/tcgen05_alloc.h>
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#include <cuda/__ptx/instructions/tcgen05_commit.h>
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#include <cuda/__ptx/instructions/tcgen05_cp.h>
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#include <cuda/__ptx/instructions/tcgen05_fence.h>
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#include <cuda/__ptx/instructions/tcgen05_ld.h>
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#include <cuda/__ptx/instructions/tcgen05_mma.h>
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#include <cuda/__ptx/instructions/tcgen05_mma_ws.h>
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#include <cuda/__ptx/instructions/tcgen05_shift.h>
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#include <cuda/__ptx/instructions/tcgen05_st.h>
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#include <cuda/__ptx/instructions/tcgen05_wait.h>
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#include <cuda/__ptx/instructions/tensormap_cp_fenceproxy.h>
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#include <cuda/__ptx/instructions/tensormap_replace.h>
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#include <cuda/__ptx/instructions/trap.h>
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#include <cuda/__ptx/pragmas/enable_smem_spilling.h>
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#include <cuda/std/__cccl/prologue.h>
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_CCCL_BEGIN_NAMESPACE_CUDA_DEVICE
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namespace ptx = ::cuda::ptx;
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_CCCL_END_NAMESPACE_CUDA_DEVICE
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#include <cuda/std/__cccl/epilogue.h>
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#endif // _CUDA_PTX
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