56fd68e7dd
CCCL (CUDA C++ Core Libraries) provides: - CUB: device/block/warp-level GPU primitives (reduce, scan, sort, topk) - Thrust: high-level parallel algorithms (transform_reduce, sort, scan) - libcudacxx: CUDA C++ standard library (atomics, barriers, memory) - cudax: experimental features (memory resources, allocators) - Tuning policies: per-SM hardware-specific algorithm parameters Competition optimization vectors mapped to CCCL: - Output TPS (83% weight): warp_reduce, block_reduce, device_topk - Input TPS (14% weight): device_scan, block_load, prefetch - Cache TPS (3% weight): prefix caching strategy patterns - Memory (0.9 util): pooled/cached/buddy allocators Source: https://github.com/NVIDIA/cccl (shallow clone, HEAD only) License: Apache-2.0
86 lines
3.2 KiB
C++
86 lines
3.2 KiB
C++
//===----------------------------------------------------------------------===//
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//
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// Part of libcu++, the C++ Standard Library for your entire system,
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// under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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// SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
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//
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//===----------------------------------------------------------------------===//
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#ifndef IMAGE_PIPELINE_H
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#define IMAGE_PIPELINE_H
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#include <cuda/buffer>
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#include <cuda/devices>
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#include <cuda/memory_resource>
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#include <cuda/std/cstddef>
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#include <cuda/std/cstdint>
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#include <cuda/std/limits>
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#include <cuda/std/span>
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#include <cuda/stream>
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// ── Constants ────────────────────────────────────────────────────────
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/// Pixel type: 8-bit grayscale.
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using pixel_t = uint8_t;
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/// Full-image histogram count type.
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using histogram_count_t = long long;
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/// Image dimensions. 65K x 65K (~4 GB raw). Large enough that
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/// the working set won't fit in most GPUs, forcing real tiling.
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/// Note: the full image is held in pinned host memory (~4 GB).
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/// Ensure the system has at least 8 GB of RAM.
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inline constexpr int image_width = 65536;
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inline constexpr int image_height = 65536;
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inline constexpr size_t image_pixels = static_cast<size_t>(image_width) * image_height;
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/// Preview downscale factor. The output preview images are
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/// (image_width / preview_scale) x (image_height / preview_scale).
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inline constexpr int preview_scale = 64;
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/// Histogram bins (one per possible grayscale value).
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inline constexpr int num_bins = cuda::std::numeric_limits<pixel_t>::max() + 1;
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inline constexpr int num_levels = num_bins + 1; // CUB needs num_levels = num_bins + 1
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// ── Shared data structures ───────────────────────────────────────────
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/// Device selection and tile sizing results.
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struct device_plan
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{
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cuda::device_ref device;
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int tile_rows;
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int num_tiles;
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size_t gpu_budget;
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};
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/// All working memory for the pipeline.
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struct tile_buffers
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{
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cuda::device_buffer<pixel_t> dev_tile[2]; // double-buffered H2D
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cuda::device_buffer<float> dev_float_tile[2]; // normalized float tile
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cuda::device_buffer<int> dev_histogram[2]; // per-tile histogram
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cuda::device_buffer<float4> dev_tile_stats; // per-tile reduction: {count, min, max, sum}
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cuda::device_buffer<pixel_t> dev_lut; // equalization LUT
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cuda::device_buffer<pixel_t> dev_equalized[2]; // equalized tile
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cuda::host_buffer<pixel_t> host_image; // full image in pinned memory
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cuda::host_buffer<int> host_tile_histograms; // per-tile histograms
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cuda::host_buffer<float4> host_tile_stats; // per-tile stats readback
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cuda::device_buffer<pixel_t> dev_preview[2]; // downscaled preview tile
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cuda::mr::shared_resource<cuda::device_memory_pool> device_pool;
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size_t tile_pixels;
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};
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/// Per-tile processing statistics.
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struct tile_stats
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{
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float min_val;
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float max_val;
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float sum;
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long long num_selected;
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};
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#endif // IMAGE_PIPELINE_H
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