2a7ca101d7
Sparse-checkout from NVIDIA/cccl main branch to complete cccl_upstream: Added: - python/cuda_cccl/ (226 files) — Python bindings for device-level algorithms Critical for muh toolchain: cuda.compute.reduce_into, scan, radix_sort, etc. Includes 204 .py files with full test coverage for all 27 algorithms - ci/ (163 files) — Build/test infrastructure build_cub.sh, test_cub.sh, build_and_test_targets.sh, matrix.yaml Directly maps to our [INFRA-CI] and [INFRA-BUILD] items - .agent/skills/ (7 files) — NVIDIA's own agent skills for CCCL cccl-style/SKILL.md, cccl-test/SKILL.md, sass-diff/SKILL.md - docs/ (491 files) — Official CCCL documentation CI references, CMake guides, Python compute docs, libcudacxx PTX docs - test/ (12 files) — Top-level integration tests (cuda_smoke, stdpar) - Root configs: .clang-format, .clang-tidy, CONTRIBUTING.md, pyproject.toml - CLAUDE.md symlink → AGENTS.md (NVIDIA's standard) cccl_upstream now mirrors full NVIDIA/cccl structure: Before: 42M (cub + thrust + libcudacxx + cudax + c + examples + benchmarks) After: 53M (+python +ci +docs +.agent +test +configs) This completes the CCCL base needed for: - [muh-bench] items: ci/util/build_and_test_targets.sh for targeted builds - [CCCL-verify] items: python/cuda_cccl/tests/ as reference implementations - [CCCL-test] items: ci/test_cub.sh, ci/test_thrust.sh - Agent workflow: .agent/skills/ for consistent style and test patterns
603 lines
19 KiB
ReStructuredText
603 lines
19 KiB
ReStructuredText
..
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This file was automatically generated. Do not edit.
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st.global.b8
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^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.b8 [addr], src; // PTX ISA 10, SM_50
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// .space = { .global }
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template <typename B8, enable_if_t<sizeof(B8) == 1, bool> = true>
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__device__ static inline void st(
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cuda::ptx::space_global_t,
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B8* addr,
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B8 src);
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st.global.b16
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^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.b16 [addr], src; // PTX ISA 10, SM_50
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// .space = { .global }
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template <typename B16, enable_if_t<sizeof(B16) == 2, bool> = true>
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__device__ static inline void st(
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cuda::ptx::space_global_t,
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B16* addr,
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B16 src);
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st.global.b32
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^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.b32 [addr], src; // PTX ISA 10, SM_50
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// .space = { .global }
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template <typename B32, enable_if_t<sizeof(B32) == 4, bool> = true>
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__device__ static inline void st(
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cuda::ptx::space_global_t,
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B32* addr,
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B32 src);
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st.global.b64
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^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.b64 [addr], src; // PTX ISA 10, SM_50
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// .space = { .global }
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template <typename B64, enable_if_t<sizeof(B64) == 8, bool> = true>
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__device__ static inline void st(
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cuda::ptx::space_global_t,
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B64* addr,
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B64 src);
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st.global.b128
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^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.b128 [addr], src; // PTX ISA 83, SM_70
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// .space = { .global }
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template <typename B128, enable_if_t<sizeof(B128) == 16, bool> = true>
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__device__ static inline void st(
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cuda::ptx::space_global_t,
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B128* addr,
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B128 src);
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st.global.v4.b64
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^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.v4.b64 [addr], src; // PTX ISA 88, SM_100
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// .space = { .global }
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template <typename B256, enable_if_t<sizeof(B256) == 32, bool> = true>
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__device__ static inline void st(
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cuda::ptx::space_global_t,
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B256* addr,
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B256 src);
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st.global.L2::cache_hint.b8
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^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L2::cache_hint.b8 [addr], src, cache_policy; // PTX ISA 74, SM_80
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// .space = { .global }
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template <typename B8, enable_if_t<sizeof(B8) == 1, bool> = true>
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__device__ static inline void st_L2_cache_hint(
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cuda::ptx::space_global_t,
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B8* addr,
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B8 src,
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uint64_t cache_policy);
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st.global.L2::cache_hint.b16
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L2::cache_hint.b16 [addr], src, cache_policy; // PTX ISA 74, SM_80
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// .space = { .global }
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template <typename B16, enable_if_t<sizeof(B16) == 2, bool> = true>
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__device__ static inline void st_L2_cache_hint(
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cuda::ptx::space_global_t,
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B16* addr,
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B16 src,
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uint64_t cache_policy);
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st.global.L2::cache_hint.b32
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L2::cache_hint.b32 [addr], src, cache_policy; // PTX ISA 74, SM_80
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// .space = { .global }
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template <typename B32, enable_if_t<sizeof(B32) == 4, bool> = true>
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__device__ static inline void st_L2_cache_hint(
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cuda::ptx::space_global_t,
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B32* addr,
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B32 src,
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uint64_t cache_policy);
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st.global.L2::cache_hint.b64
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L2::cache_hint.b64 [addr], src, cache_policy; // PTX ISA 74, SM_80
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// .space = { .global }
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template <typename B64, enable_if_t<sizeof(B64) == 8, bool> = true>
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__device__ static inline void st_L2_cache_hint(
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cuda::ptx::space_global_t,
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B64* addr,
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B64 src,
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uint64_t cache_policy);
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st.global.L2::cache_hint.b128
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L2::cache_hint.b128 [addr], src, cache_policy; // PTX ISA 83, SM_80
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// .space = { .global }
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template <typename B128, enable_if_t<sizeof(B128) == 16, bool> = true>
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__device__ static inline void st_L2_cache_hint(
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cuda::ptx::space_global_t,
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B128* addr,
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B128 src,
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uint64_t cache_policy);
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st.global.L2::cache_hint.v4.b64
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L2::cache_hint.v4.b64 [addr], src, cache_policy; // PTX ISA 88, SM_100
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// .space = { .global }
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template <typename B256, enable_if_t<sizeof(B256) == 32, bool> = true>
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__device__ static inline void st_L2_cache_hint(
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cuda::ptx::space_global_t,
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B256* addr,
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B256 src,
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uint64_t cache_policy);
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st.global.L1::evict_first.b8
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L1::evict_first.b8 [addr], src; // PTX ISA 74, SM_70
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// .space = { .global }
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template <typename B8, enable_if_t<sizeof(B8) == 1, bool> = true>
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__device__ static inline void st_L1_evict_first(
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cuda::ptx::space_global_t,
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B8* addr,
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B8 src);
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st.global.L1::evict_first.b16
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L1::evict_first.b16 [addr], src; // PTX ISA 74, SM_70
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// .space = { .global }
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template <typename B16, enable_if_t<sizeof(B16) == 2, bool> = true>
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__device__ static inline void st_L1_evict_first(
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cuda::ptx::space_global_t,
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B16* addr,
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B16 src);
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st.global.L1::evict_first.b32
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L1::evict_first.b32 [addr], src; // PTX ISA 74, SM_70
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// .space = { .global }
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template <typename B32, enable_if_t<sizeof(B32) == 4, bool> = true>
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__device__ static inline void st_L1_evict_first(
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cuda::ptx::space_global_t,
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B32* addr,
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B32 src);
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st.global.L1::evict_first.b64
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L1::evict_first.b64 [addr], src; // PTX ISA 74, SM_70
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// .space = { .global }
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template <typename B64, enable_if_t<sizeof(B64) == 8, bool> = true>
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__device__ static inline void st_L1_evict_first(
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cuda::ptx::space_global_t,
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B64* addr,
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B64 src);
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st.global.L1::evict_first.b128
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L1::evict_first.b128 [addr], src; // PTX ISA 83, SM_70
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// .space = { .global }
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template <typename B128, enable_if_t<sizeof(B128) == 16, bool> = true>
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__device__ static inline void st_L1_evict_first(
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cuda::ptx::space_global_t,
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B128* addr,
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B128 src);
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st.global.L1::evict_first.v4.b64
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L1::evict_first.v4.b64 [addr], src; // PTX ISA 88, SM_100
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// .space = { .global }
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template <typename B256, enable_if_t<sizeof(B256) == 32, bool> = true>
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__device__ static inline void st_L1_evict_first(
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cuda::ptx::space_global_t,
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B256* addr,
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B256 src);
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st.global.L1::evict_first.L2::cache_hint.b8
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L1::evict_first.L2::cache_hint.b8 [addr], src, cache_policy; // PTX ISA 74, SM_80
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// .space = { .global }
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template <typename B8, enable_if_t<sizeof(B8) == 1, bool> = true>
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__device__ static inline void st_L1_evict_first_L2_cache_hint(
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cuda::ptx::space_global_t,
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B8* addr,
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B8 src,
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uint64_t cache_policy);
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st.global.L1::evict_first.L2::cache_hint.b16
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L1::evict_first.L2::cache_hint.b16 [addr], src, cache_policy; // PTX ISA 74, SM_80
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// .space = { .global }
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template <typename B16, enable_if_t<sizeof(B16) == 2, bool> = true>
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__device__ static inline void st_L1_evict_first_L2_cache_hint(
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cuda::ptx::space_global_t,
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B16* addr,
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B16 src,
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uint64_t cache_policy);
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st.global.L1::evict_first.L2::cache_hint.b32
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L1::evict_first.L2::cache_hint.b32 [addr], src, cache_policy; // PTX ISA 74, SM_80
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// .space = { .global }
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template <typename B32, enable_if_t<sizeof(B32) == 4, bool> = true>
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__device__ static inline void st_L1_evict_first_L2_cache_hint(
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cuda::ptx::space_global_t,
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B32* addr,
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B32 src,
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uint64_t cache_policy);
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st.global.L1::evict_first.L2::cache_hint.b64
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L1::evict_first.L2::cache_hint.b64 [addr], src, cache_policy; // PTX ISA 74, SM_80
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// .space = { .global }
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template <typename B64, enable_if_t<sizeof(B64) == 8, bool> = true>
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__device__ static inline void st_L1_evict_first_L2_cache_hint(
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cuda::ptx::space_global_t,
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B64* addr,
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B64 src,
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uint64_t cache_policy);
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st.global.L1::evict_first.L2::cache_hint.b128
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L1::evict_first.L2::cache_hint.b128 [addr], src, cache_policy; // PTX ISA 83, SM_80
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// .space = { .global }
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template <typename B128, enable_if_t<sizeof(B128) == 16, bool> = true>
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__device__ static inline void st_L1_evict_first_L2_cache_hint(
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cuda::ptx::space_global_t,
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B128* addr,
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B128 src,
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uint64_t cache_policy);
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st.global.L1::evict_first.L2::cache_hint.v4.b64
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L1::evict_first.L2::cache_hint.v4.b64 [addr], src, cache_policy; // PTX ISA 88, SM_100
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// .space = { .global }
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template <typename B256, enable_if_t<sizeof(B256) == 32, bool> = true>
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__device__ static inline void st_L1_evict_first_L2_cache_hint(
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cuda::ptx::space_global_t,
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B256* addr,
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B256 src,
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uint64_t cache_policy);
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st.global.L1::evict_last.b8
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^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L1::evict_last.b8 [addr], src; // PTX ISA 74, SM_70
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// .space = { .global }
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template <typename B8, enable_if_t<sizeof(B8) == 1, bool> = true>
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__device__ static inline void st_L1_evict_last(
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cuda::ptx::space_global_t,
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B8* addr,
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B8 src);
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st.global.L1::evict_last.b16
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L1::evict_last.b16 [addr], src; // PTX ISA 74, SM_70
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// .space = { .global }
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template <typename B16, enable_if_t<sizeof(B16) == 2, bool> = true>
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__device__ static inline void st_L1_evict_last(
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cuda::ptx::space_global_t,
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B16* addr,
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B16 src);
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st.global.L1::evict_last.b32
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L1::evict_last.b32 [addr], src; // PTX ISA 74, SM_70
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// .space = { .global }
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template <typename B32, enable_if_t<sizeof(B32) == 4, bool> = true>
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__device__ static inline void st_L1_evict_last(
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cuda::ptx::space_global_t,
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B32* addr,
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B32 src);
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st.global.L1::evict_last.b64
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L1::evict_last.b64 [addr], src; // PTX ISA 74, SM_70
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// .space = { .global }
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template <typename B64, enable_if_t<sizeof(B64) == 8, bool> = true>
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__device__ static inline void st_L1_evict_last(
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cuda::ptx::space_global_t,
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B64* addr,
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B64 src);
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st.global.L1::evict_last.b128
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L1::evict_last.b128 [addr], src; // PTX ISA 83, SM_70
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// .space = { .global }
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template <typename B128, enable_if_t<sizeof(B128) == 16, bool> = true>
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__device__ static inline void st_L1_evict_last(
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cuda::ptx::space_global_t,
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B128* addr,
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B128 src);
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st.global.L1::evict_last.v4.b64
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L1::evict_last.v4.b64 [addr], src; // PTX ISA 88, SM_100
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// .space = { .global }
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template <typename B256, enable_if_t<sizeof(B256) == 32, bool> = true>
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__device__ static inline void st_L1_evict_last(
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cuda::ptx::space_global_t,
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B256* addr,
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B256 src);
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st.global.L1::evict_last.L2::cache_hint.b8
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L1::evict_last.L2::cache_hint.b8 [addr], src, cache_policy; // PTX ISA 74, SM_80
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// .space = { .global }
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template <typename B8, enable_if_t<sizeof(B8) == 1, bool> = true>
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__device__ static inline void st_L1_evict_last_L2_cache_hint(
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cuda::ptx::space_global_t,
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B8* addr,
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B8 src,
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uint64_t cache_policy);
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st.global.L1::evict_last.L2::cache_hint.b16
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L1::evict_last.L2::cache_hint.b16 [addr], src, cache_policy; // PTX ISA 74, SM_80
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// .space = { .global }
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template <typename B16, enable_if_t<sizeof(B16) == 2, bool> = true>
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__device__ static inline void st_L1_evict_last_L2_cache_hint(
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cuda::ptx::space_global_t,
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B16* addr,
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B16 src,
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uint64_t cache_policy);
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st.global.L1::evict_last.L2::cache_hint.b32
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// st.space.L1::evict_last.L2::cache_hint.b32 [addr], src, cache_policy; // PTX ISA 74, SM_80
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// .space = { .global }
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template <typename B32, enable_if_t<sizeof(B32) == 4, bool> = true>
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__device__ static inline void st_L1_evict_last_L2_cache_hint(
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cuda::ptx::space_global_t,
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B32* addr,
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B32 src,
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uint64_t cache_policy);
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st.global.L1::evict_last.L2::cache_hint.b64
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|
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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|
.. code-block:: cuda
|
|
|
|
// st.space.L1::evict_last.L2::cache_hint.b64 [addr], src, cache_policy; // PTX ISA 74, SM_80
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|
// .space = { .global }
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|
template <typename B64, enable_if_t<sizeof(B64) == 8, bool> = true>
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__device__ static inline void st_L1_evict_last_L2_cache_hint(
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cuda::ptx::space_global_t,
|
|
B64* addr,
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|
B64 src,
|
|
uint64_t cache_policy);
|
|
|
|
st.global.L1::evict_last.L2::cache_hint.b128
|
|
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
|
.. code-block:: cuda
|
|
|
|
// st.space.L1::evict_last.L2::cache_hint.b128 [addr], src, cache_policy; // PTX ISA 83, SM_80
|
|
// .space = { .global }
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|
template <typename B128, enable_if_t<sizeof(B128) == 16, bool> = true>
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|
__device__ static inline void st_L1_evict_last_L2_cache_hint(
|
|
cuda::ptx::space_global_t,
|
|
B128* addr,
|
|
B128 src,
|
|
uint64_t cache_policy);
|
|
|
|
st.global.L1::evict_last.L2::cache_hint.v4.b64
|
|
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
|
.. code-block:: cuda
|
|
|
|
// st.space.L1::evict_last.L2::cache_hint.v4.b64 [addr], src, cache_policy; // PTX ISA 88, SM_100
|
|
// .space = { .global }
|
|
template <typename B256, enable_if_t<sizeof(B256) == 32, bool> = true>
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|
__device__ static inline void st_L1_evict_last_L2_cache_hint(
|
|
cuda::ptx::space_global_t,
|
|
B256* addr,
|
|
B256 src,
|
|
uint64_t cache_policy);
|
|
|
|
st.global.L1::no_allocate.b8
|
|
^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
|
.. code-block:: cuda
|
|
|
|
// st.space.L1::no_allocate.b8 [addr], src; // PTX ISA 74, SM_70
|
|
// .space = { .global }
|
|
template <typename B8, enable_if_t<sizeof(B8) == 1, bool> = true>
|
|
__device__ static inline void st_L1_no_allocate(
|
|
cuda::ptx::space_global_t,
|
|
B8* addr,
|
|
B8 src);
|
|
|
|
st.global.L1::no_allocate.b16
|
|
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
|
.. code-block:: cuda
|
|
|
|
// st.space.L1::no_allocate.b16 [addr], src; // PTX ISA 74, SM_70
|
|
// .space = { .global }
|
|
template <typename B16, enable_if_t<sizeof(B16) == 2, bool> = true>
|
|
__device__ static inline void st_L1_no_allocate(
|
|
cuda::ptx::space_global_t,
|
|
B16* addr,
|
|
B16 src);
|
|
|
|
st.global.L1::no_allocate.b32
|
|
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
|
.. code-block:: cuda
|
|
|
|
// st.space.L1::no_allocate.b32 [addr], src; // PTX ISA 74, SM_70
|
|
// .space = { .global }
|
|
template <typename B32, enable_if_t<sizeof(B32) == 4, bool> = true>
|
|
__device__ static inline void st_L1_no_allocate(
|
|
cuda::ptx::space_global_t,
|
|
B32* addr,
|
|
B32 src);
|
|
|
|
st.global.L1::no_allocate.b64
|
|
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
|
.. code-block:: cuda
|
|
|
|
// st.space.L1::no_allocate.b64 [addr], src; // PTX ISA 74, SM_70
|
|
// .space = { .global }
|
|
template <typename B64, enable_if_t<sizeof(B64) == 8, bool> = true>
|
|
__device__ static inline void st_L1_no_allocate(
|
|
cuda::ptx::space_global_t,
|
|
B64* addr,
|
|
B64 src);
|
|
|
|
st.global.L1::no_allocate.b128
|
|
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
|
.. code-block:: cuda
|
|
|
|
// st.space.L1::no_allocate.b128 [addr], src; // PTX ISA 83, SM_70
|
|
// .space = { .global }
|
|
template <typename B128, enable_if_t<sizeof(B128) == 16, bool> = true>
|
|
__device__ static inline void st_L1_no_allocate(
|
|
cuda::ptx::space_global_t,
|
|
B128* addr,
|
|
B128 src);
|
|
|
|
st.global.L1::no_allocate.v4.b64
|
|
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
|
.. code-block:: cuda
|
|
|
|
// st.space.L1::no_allocate.v4.b64 [addr], src; // PTX ISA 88, SM_100
|
|
// .space = { .global }
|
|
template <typename B256, enable_if_t<sizeof(B256) == 32, bool> = true>
|
|
__device__ static inline void st_L1_no_allocate(
|
|
cuda::ptx::space_global_t,
|
|
B256* addr,
|
|
B256 src);
|
|
|
|
st.global.L1::no_allocate.L2::cache_hint.b8
|
|
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
|
.. code-block:: cuda
|
|
|
|
// st.space.L1::no_allocate.L2::cache_hint.b8 [addr], src, cache_policy; // PTX ISA 74, SM_80
|
|
// .space = { .global }
|
|
template <typename B8, enable_if_t<sizeof(B8) == 1, bool> = true>
|
|
__device__ static inline void st_L1_no_allocate_L2_cache_hint(
|
|
cuda::ptx::space_global_t,
|
|
B8* addr,
|
|
B8 src,
|
|
uint64_t cache_policy);
|
|
|
|
st.global.L1::no_allocate.L2::cache_hint.b16
|
|
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
|
.. code-block:: cuda
|
|
|
|
// st.space.L1::no_allocate.L2::cache_hint.b16 [addr], src, cache_policy; // PTX ISA 74, SM_80
|
|
// .space = { .global }
|
|
template <typename B16, enable_if_t<sizeof(B16) == 2, bool> = true>
|
|
__device__ static inline void st_L1_no_allocate_L2_cache_hint(
|
|
cuda::ptx::space_global_t,
|
|
B16* addr,
|
|
B16 src,
|
|
uint64_t cache_policy);
|
|
|
|
st.global.L1::no_allocate.L2::cache_hint.b32
|
|
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
|
.. code-block:: cuda
|
|
|
|
// st.space.L1::no_allocate.L2::cache_hint.b32 [addr], src, cache_policy; // PTX ISA 74, SM_80
|
|
// .space = { .global }
|
|
template <typename B32, enable_if_t<sizeof(B32) == 4, bool> = true>
|
|
__device__ static inline void st_L1_no_allocate_L2_cache_hint(
|
|
cuda::ptx::space_global_t,
|
|
B32* addr,
|
|
B32 src,
|
|
uint64_t cache_policy);
|
|
|
|
st.global.L1::no_allocate.L2::cache_hint.b64
|
|
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
|
.. code-block:: cuda
|
|
|
|
// st.space.L1::no_allocate.L2::cache_hint.b64 [addr], src, cache_policy; // PTX ISA 74, SM_80
|
|
// .space = { .global }
|
|
template <typename B64, enable_if_t<sizeof(B64) == 8, bool> = true>
|
|
__device__ static inline void st_L1_no_allocate_L2_cache_hint(
|
|
cuda::ptx::space_global_t,
|
|
B64* addr,
|
|
B64 src,
|
|
uint64_t cache_policy);
|
|
|
|
st.global.L1::no_allocate.L2::cache_hint.b128
|
|
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
|
.. code-block:: cuda
|
|
|
|
// st.space.L1::no_allocate.L2::cache_hint.b128 [addr], src, cache_policy; // PTX ISA 83, SM_80
|
|
// .space = { .global }
|
|
template <typename B128, enable_if_t<sizeof(B128) == 16, bool> = true>
|
|
__device__ static inline void st_L1_no_allocate_L2_cache_hint(
|
|
cuda::ptx::space_global_t,
|
|
B128* addr,
|
|
B128 src,
|
|
uint64_t cache_policy);
|
|
|
|
st.global.L1::no_allocate.L2::cache_hint.v4.b64
|
|
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
|
.. code-block:: cuda
|
|
|
|
// st.space.L1::no_allocate.L2::cache_hint.v4.b64 [addr], src, cache_policy; // PTX ISA 88, SM_100
|
|
// .space = { .global }
|
|
template <typename B256, enable_if_t<sizeof(B256) == 32, bool> = true>
|
|
__device__ static inline void st_L1_no_allocate_L2_cache_hint(
|
|
cuda::ptx::space_global_t,
|
|
B256* addr,
|
|
B256 src,
|
|
uint64_t cache_policy);
|