Sparse-checkout from NVIDIA/cccl main branch to complete cccl_upstream: Added: - python/cuda_cccl/ (226 files) — Python bindings for device-level algorithms Critical for muh toolchain: cuda.compute.reduce_into, scan, radix_sort, etc. Includes 204 .py files with full test coverage for all 27 algorithms - ci/ (163 files) — Build/test infrastructure build_cub.sh, test_cub.sh, build_and_test_targets.sh, matrix.yaml Directly maps to our [INFRA-CI] and [INFRA-BUILD] items - .agent/skills/ (7 files) — NVIDIA's own agent skills for CCCL cccl-style/SKILL.md, cccl-test/SKILL.md, sass-diff/SKILL.md - docs/ (491 files) — Official CCCL documentation CI references, CMake guides, Python compute docs, libcudacxx PTX docs - test/ (12 files) — Top-level integration tests (cuda_smoke, stdpar) - Root configs: .clang-format, .clang-tidy, CONTRIBUTING.md, pyproject.toml - CLAUDE.md symlink → AGENTS.md (NVIDIA's standard) cccl_upstream now mirrors full NVIDIA/cccl structure: Before: 42M (cub + thrust + libcudacxx + cudax + c + examples + benchmarks) After: 53M (+python +ci +docs +.agent +test +configs) This completes the CCCL base needed for: - [muh-bench] items: ci/util/build_and_test_targets.sh for targeted builds - [CCCL-verify] items: python/cuda_cccl/tests/ as reference implementations - [CCCL-test] items: ci/test_cub.sh, ci/test_thrust.sh - Agent workflow: .agent/skills/ for consistent style and test patterns
75 lines
2.3 KiB
ReStructuredText
75 lines
2.3 KiB
ReStructuredText
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This file was automatically generated. Do not edit.
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bfind.u32
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^^^^^^^^^
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.. code-block:: cuda
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// bfind.u32 dest, a_reg; // PTX ISA 20, SM_50
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template <typename U32, enable_if_t<sizeof(U32) == 4 && is_integral_v<U32> && is_unsigned_v<U32>, bool> = true>
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__device__ static inline uint32_t bfind(
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U32 a_reg);
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bfind.shiftamt.u32
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^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// bfind.shiftamt.u32 dest, a_reg; // PTX ISA 20, SM_50
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template <typename U32, enable_if_t<sizeof(U32) == 4 && is_integral_v<U32> && is_unsigned_v<U32>, bool> = true>
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__device__ static inline uint32_t bfind_shiftamt(
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U32 a_reg);
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bfind.u64
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^^^^^^^^^
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.. code-block:: cuda
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// bfind.u64 dest, a_reg; // PTX ISA 20, SM_50
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template <typename U64, enable_if_t<sizeof(U64) == 8 && is_integral_v<U64> && is_unsigned_v<U64>, bool> = true>
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__device__ static inline uint32_t bfind(
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U64 a_reg);
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bfind.shiftamt.u64
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^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// bfind.shiftamt.u64 dest, a_reg; // PTX ISA 20, SM_50
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template <typename U64, enable_if_t<sizeof(U64) == 8 && is_integral_v<U64> && is_unsigned_v<U64>, bool> = true>
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__device__ static inline uint32_t bfind_shiftamt(
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U64 a_reg);
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bfind.s32
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^^^^^^^^^
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.. code-block:: cuda
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// bfind.s32 dest, a_reg; // PTX ISA 20, SM_50
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template <typename S32, enable_if_t<sizeof(S32) == 4 && is_integral_v<S32> && is_signed_v<S32>, bool> = true>
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__device__ static inline uint32_t bfind(
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S32 a_reg);
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bfind.shiftamt.s32
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^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// bfind.shiftamt.s32 dest, a_reg; // PTX ISA 20, SM_50
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template <typename S32, enable_if_t<sizeof(S32) == 4 && is_integral_v<S32> && is_signed_v<S32>, bool> = true>
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__device__ static inline uint32_t bfind_shiftamt(
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S32 a_reg);
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bfind.s64
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^^^^^^^^^
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.. code-block:: cuda
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// bfind.s64 dest, a_reg; // PTX ISA 20, SM_50
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template <typename S64, enable_if_t<sizeof(S64) == 8 && is_integral_v<S64> && is_signed_v<S64>, bool> = true>
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__device__ static inline uint32_t bfind(
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S64 a_reg);
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bfind.shiftamt.s64
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^^^^^^^^^^^^^^^^^^
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.. code-block:: cuda
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// bfind.shiftamt.s64 dest, a_reg; // PTX ISA 20, SM_50
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template <typename S64, enable_if_t<sizeof(S64) == 8 && is_integral_v<S64> && is_signed_v<S64>, bool> = true>
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__device__ static inline uint32_t bfind_shiftamt(
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S64 a_reg);
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