Added 863 files from NVIDIA/cccl sparse checkout: - c2h/ (27 files): Catch2 test helpers — generators, validators, runner - nvbench_helper/ (10 files): Benchmark harness utilities - cmake/ (29 files): CMake presets and build helpers - cudax/ (794 files): Experimental CUDA extensions - AGENTS.md: NVIDIA's official AI agent instructions for CCCL - CMakePresets.json: Standardized build configurations - cccl-version.json: Version tracking Also added CCCL_ASSET_MAP.md mapping all 4295 CCCL files to competition value and PRD items. cccl_upstream now covers 100% of competition-critical assets: - 27 tuning headers (SM80/90/100 benchmark data) - 32 dispatch headers (algorithm implementations) - 60 Thrust examples (correctness verification) - 217 CUB Catch2 tests (regression matrix) - 153 CUB benchmarks (parameter space search) - 18 CUB examples (API verification) - 27 test helpers + benchmark harness - 794 cudax experimental extensions
253 lines
9.2 KiB
Plaintext
253 lines
9.2 KiB
Plaintext
//===----------------------------------------------------------------------===//
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//
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// Part of CUDA Experimental in CUDA C++ Core Libraries,
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// under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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// SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
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//
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//===----------------------------------------------------------------------===//
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#include <cuda/devices>
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#include <cuda/functional>
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#include <cuda/hierarchy>
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#include <cuda/launch>
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#include <cuda/std/algorithm>
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#include <cuda/std/type_traits>
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#include <cuda/stream>
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#include <cuda/experimental/coop.cuh>
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#include <cuda/experimental/group.cuh>
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#include <testing.cuh>
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#include <c2h/catch2_test_helper.h>
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#include <c2h/extended_types.h>
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#include <c2h/generators.h>
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#include <catch2/matchers/catch_matchers_floating_point.hpp>
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constexpr int cluster_size = 2;
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constexpr int block_size = 128;
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/***********************************************************************************************************************
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* Thread Reduce Wrapper Kernels
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**********************************************************************************************************************/
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template <bool Broadcasted>
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struct ReduceKernel
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{
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template <class Config, int NumItems, class T, class RedOp>
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__device__ void operator()(
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Config config,
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cuda::std::integral_constant<int, NumItems>,
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const T* __restrict__ d_in,
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T* __restrict__ d_out,
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RedOp red_op)
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{
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cudax::this_grid grid{config};
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T thread_data[NumItems];
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for (int i = 0; i < NumItems; ++i)
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{
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thread_data[i] = d_in[cuda::gpu_thread.rank_as<int>(grid) + i * cuda::gpu_thread.count_as<int>(grid)];
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}
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if constexpr (Broadcasted)
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{
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const auto result = cudax::coop::reduce(cudax::broadcasted, grid, thread_data, red_op);
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d_out[cuda::gpu_thread.rank(grid)] = result;
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}
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else
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{
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const auto result = cudax::coop::reduce(grid, thread_data, red_op);
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REQUIRE(result.has_value() == cuda::gpu_thread.is_root_rank(grid));
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if (cuda::gpu_thread.is_root_rank(grid))
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{
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*d_out = result.value();
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}
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}
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}
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};
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/***********************************************************************************************************************
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* Type list definition
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**********************************************************************************************************************/
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using integral_type_list =
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c2h::type_list<cuda::std::int8_t, cuda::std::int16_t, cuda::std::uint16_t, cuda::std::int32_t, cuda::std::int64_t>;
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using fp_type_list = c2h::type_list<float, double>;
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using operator_integral_list =
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c2h::type_list<cuda::std::plus<>,
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cuda::std::multiplies<>,
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cuda::std::bit_and<>,
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cuda::std::bit_or<>,
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cuda::std::bit_xor<>,
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cuda::minimum<>,
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cuda::maximum<>>;
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using operator_fp_list = c2h::type_list<cuda::std::plus<>, cuda::std::multiplies<>, cuda::minimum<>, cuda::maximum<>>;
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using grid_size_list = c2h::enum_type_list<int, 1, 12, 32>;
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/***********************************************************************************************************************
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* Verify results and kernel launch`
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**********************************************************************************************************************/
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template <class T>
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void verify_results(const T& expected_data, const T& test_results)
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{
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if constexpr (cuda::std::is_floating_point_v<T>)
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{
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REQUIRE_THAT(expected_data, Catch::Matchers::WithinRel(test_results, T{0.05}));
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}
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else
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{
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REQUIRE(expected_data == test_results);
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}
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}
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template <int GridSize, class T, class RedOp, bool Broadcasted = false>
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void run_reduce_kernel(
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cuda::stream_ref stream,
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cuda::std::integral_constant<int, GridSize>,
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int num_items,
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const c2h::device_vector<T>& in,
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c2h::device_vector<T>& out,
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RedOp red_op,
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cuda::std::bool_constant<Broadcasted> = {})
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{
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const auto config = cuda::make_config(
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cuda::grid_dims<GridSize>(),
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cuda::cluster_dims<cluster_size>(),
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cuda::block_dims<block_size>(),
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cuda::cooperative_launch{});
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const auto in_ptr = thrust::raw_pointer_cast(in.data());
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const auto out_ptr = thrust::raw_pointer_cast(out.data());
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const ReduceKernel<Broadcasted> kernel{};
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switch (num_items)
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{
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case 1:
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cuda::launch(stream, config, kernel, cuda::std::integral_constant<int, 1>{}, in_ptr, out_ptr, red_op);
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break;
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case 4:
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cuda::launch(stream, config, kernel, cuda::std::integral_constant<int, 4>{}, in_ptr, out_ptr, red_op);
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break;
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default:
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FAIL("Unsupported number of items");
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}
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stream.sync();
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}
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constexpr int max_size = 4;
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constexpr int num_seeds = 10;
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/***********************************************************************************************************************
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* Test cases
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**********************************************************************************************************************/
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_CCCL_DIAG_SUPPRESS_MSVC(4244) // warning C4244: '=': conversion from 'int' to '_Tp', possible loss of data
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C2H_TEST("reduce/this_grid Integral Type Tests",
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"[reduce][this_grid]",
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integral_type_list,
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operator_integral_list,
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grid_size_list)
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{
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const auto device = cuda::devices[0];
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if (cuda::device_attributes::compute_capability_major(device) < 9)
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{
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return;
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}
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using value_t = c2h::get<0, TestType>;
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using op_t = c2h::get<1, TestType>;
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using grid_size_t = c2h::get<2, TestType>;
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constexpr auto reduce_op = op_t{};
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constexpr auto operator_identity = cuda::identity_element<op_t, value_t>();
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CAPTURE(c2h::type_name<value_t>(), max_size, c2h::type_name<decltype(reduce_op)>());
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c2h::device_vector<value_t> d_in(max_size * grid_size_t::value * cluster_size * block_size);
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c2h::device_vector<value_t> d_out(1);
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c2h::gen(C2H_SEED(num_seeds), d_in, cuda::std::numeric_limits<value_t>::min());
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c2h::host_vector<value_t> h_in = d_in;
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cuda::stream stream{device};
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for (int num_items : {1, 4})
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{
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auto reference_result = cuda::std::accumulate(
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h_in.begin(),
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h_in.begin() + num_items * grid_size_t::value * cluster_size * block_size,
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operator_identity,
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reduce_op);
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run_reduce_kernel(stream, grid_size_t{}, num_items, d_in, d_out, reduce_op);
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verify_results(reference_result, c2h::host_vector<value_t>(d_out)[0]);
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}
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}
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C2H_TEST(
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"reduce/this_grid Floating-Point Type Tests", "[reduce][this_grid]", fp_type_list, operator_fp_list, grid_size_list)
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{
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const auto device = cuda::devices[0];
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if (cuda::device_attributes::compute_capability_major(device) < 9)
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{
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return;
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}
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using value_t = c2h::get<0, TestType>;
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using op_t = c2h::get<1, TestType>;
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using grid_size_t = c2h::get<2, TestType>;
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constexpr auto reduce_op = op_t{};
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const auto operator_identity = cuda::identity_element<op_t, value_t>();
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CAPTURE(c2h::type_name<value_t>(), max_size, c2h::type_name<decltype(reduce_op)>());
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c2h::device_vector<value_t> d_in(max_size * grid_size_t::value * cluster_size * block_size);
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c2h::device_vector<value_t> d_out(1);
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c2h::gen(C2H_SEED(num_seeds), d_in, cuda::std::numeric_limits<value_t>::min());
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c2h::host_vector<value_t> h_in = d_in;
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cuda::stream stream{device};
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for (int num_items : {1, 4})
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{
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auto reference_result = cuda::std::accumulate(
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h_in.begin(),
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h_in.begin() + num_items * grid_size_t::value * cluster_size * block_size,
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operator_identity,
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reduce_op);
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run_reduce_kernel(stream, grid_size_t{}, num_items, d_in, d_out, reduce_op);
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verify_results(reference_result, c2h::host_vector<value_t>(d_out)[0]);
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}
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}
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C2H_TEST("reduce/this_grid Broadcasted", "[reduce][this_grid]", integral_type_list, grid_size_list)
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{
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const auto device = cuda::devices[0];
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if (cuda::device_attributes::compute_capability_major(device) < 9)
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{
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return;
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}
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using value_t = c2h::get<0, TestType>;
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using op_t = cuda::std::plus<>;
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using grid_size_t = c2h::get<1, TestType>;
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constexpr auto reduce_op = op_t{};
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constexpr auto operator_identity = cuda::identity_element<op_t, value_t>();
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CAPTURE(c2h::type_name<value_t>(), max_size, c2h::type_name<decltype(reduce_op)>());
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c2h::device_vector<value_t> d_in(max_size * grid_size_t::value * cluster_size * block_size);
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c2h::gen(C2H_SEED(num_seeds), d_in, cuda::std::numeric_limits<value_t>::min());
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c2h::host_vector<value_t> h_in = d_in;
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cuda::stream stream{device};
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for (int num_items : {1, 4})
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{
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c2h::device_vector<value_t> d_out(grid_size_t::value * cluster_size * block_size);
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auto reference_result = cuda::std::accumulate(
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h_in.begin(),
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h_in.begin() + num_items * grid_size_t::value * cluster_size * block_size,
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operator_identity,
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reduce_op);
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run_reduce_kernel(stream, grid_size_t{}, num_items, d_in, d_out, reduce_op, cuda::std::true_type{});
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verify_results(c2h::host_vector<value_t>(grid_size_t::value * cluster_size * block_size, reference_result),
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c2h::host_vector<value_t>(d_out));
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}
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}
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