56fd68e7dd
CCCL (CUDA C++ Core Libraries) provides: - CUB: device/block/warp-level GPU primitives (reduce, scan, sort, topk) - Thrust: high-level parallel algorithms (transform_reduce, sort, scan) - libcudacxx: CUDA C++ standard library (atomics, barriers, memory) - cudax: experimental features (memory resources, allocators) - Tuning policies: per-SM hardware-specific algorithm parameters Competition optimization vectors mapped to CCCL: - Output TPS (83% weight): warp_reduce, block_reduce, device_topk - Input TPS (14% weight): device_scan, block_load, prefetch - Cache TPS (3% weight): prefix caching strategy patterns - Memory (0.9 util): pooled/cached/buddy allocators Source: https://github.com/NVIDIA/cccl (shallow clone, HEAD only) License: Apache-2.0
79 lines
2.3 KiB
Plaintext
79 lines
2.3 KiB
Plaintext
// SPDX-FileCopyrightText: Copyright (c) 2024, NVIDIA CORPORATION. All rights reserved.
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// SPDX-License-Identifier: BSD-3-Clause
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// %RANGE% TUNE_BIF_BIAS bif -16:16:4
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// %RANGE% TUNE_ALGORITHM alg 0:4:1
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// %RANGE% TUNE_THREADS tpb 128:1024:128
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// for TUNE_ALGORITHM == 1 (vectorized), this is the number of vectors per thread, which is similar in spirit
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// %RANGE% TUNE_UNROLL_FACTOR unrl 1:4:1
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// those parameters only apply if TUNE_ALGORITHM == 0 (prefetch)
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// %RANGE% TUNE_PREFETCH_MULT pref 1:3:1
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// those parameters only apply if TUNE_ALGORITHM == 1 (vectorized)
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// %RANGE% TUNE_VEC_SIZE_POW2 vsp2 1:6:1
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#if !TUNE_BASE && TUNE_ALGORITHM != 0 && (TUNE_PREFETCH_MULT != 1)
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# error "Non-prefetch algorithms require prefetch multiple to be 1 since they ignore the parameters"
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#endif // !TUNE_BASE && TUNE_ALGORITHM != 0 && (TUNE_PREFETCH_MULT != 1)
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#if !TUNE_BASE && TUNE_ALGORITHM != 1 && (TUNE_VEC_SIZE_POW2 != 1)
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# error "Non-vectorized algorithms require vector size to be 1 since they ignore the parameters"
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#endif // !TUNE_BASE && TUNE_ALGORITHM != 1 && (TUNE_VEC_SIZE_POW2 != 1)
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#include "common.h"
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// This benchmark is compute intensive with diverging threads
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template <class IndexT, class OutputT>
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struct fib_t
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{
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__device__ OutputT operator()(IndexT n)
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{
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OutputT t1 = 0;
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OutputT t2 = 1;
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if (n < 1)
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{
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return t1;
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}
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if (n == 1)
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{
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return t1;
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}
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if (n == 2)
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{
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return t2;
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}
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for (IndexT i = 3; i <= n; ++i)
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{
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const auto next = t1 + t2;
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t1 = t2;
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t2 = next;
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}
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return t2;
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}
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};
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static void fibonacci(nvbench::state& state)
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try
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{
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using index_t = int64_t;
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using output_t = uint32_t;
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const auto n = state.get_int64("Elements{io}");
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thrust::device_vector<index_t> in = generate(n, bit_entropy::_1_000, index_t{0}, index_t{42});
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thrust::device_vector<output_t> out(n);
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state.add_element_count(n);
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state.add_global_memory_reads<index_t>(n);
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state.add_global_memory_writes<output_t>(n);
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bench_transform(state, cuda::std::tuple{in.begin()}, out.begin(), n, fib_t<index_t, output_t>{});
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}
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catch (const std::bad_alloc&)
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{
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state.skip("Skipping: out of memory.");
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}
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NVBENCH_BENCH(fibonacci).set_name("fibonacci").add_int64_power_of_two_axis("Elements{io}", nvbench::range(16, 32, 4));
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