CCCL (CUDA C++ Core Libraries) provides: - CUB: device/block/warp-level GPU primitives (reduce, scan, sort, topk) - Thrust: high-level parallel algorithms (transform_reduce, sort, scan) - libcudacxx: CUDA C++ standard library (atomics, barriers, memory) - cudax: experimental features (memory resources, allocators) - Tuning policies: per-SM hardware-specific algorithm parameters Competition optimization vectors mapped to CCCL: - Output TPS (83% weight): warp_reduce, block_reduce, device_topk - Input TPS (14% weight): device_scan, block_load, prefetch - Cache TPS (3% weight): prefix caching strategy patterns - Memory (0.9 util): pooled/cached/buddy allocators Source: https://github.com/NVIDIA/cccl (shallow clone, HEAD only) License: Apache-2.0
253 lines
8.6 KiB
Plaintext
253 lines
8.6 KiB
Plaintext
// SPDX-FileCopyrightText: Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved.
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// SPDX-License-Identifier: BSD-3
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#include <cub/device/device_memcpy.cuh>
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// %RANGE% TUNE_THREADS tpb 128:1024:32
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// %RANGE% TUNE_BUFFERS_PER_THREAD bpt 1:18:1
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// %RANGE% TUNE_TLEV_BYTES_PER_THREAD tlevbpt 2:16:2
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// %RANGE% TUNE_LARGE_THREADS ltpb 128:1024:32
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// %RANGE% TUNE_LARGE_BUFFER_BYTES_PER_THREAD lbbpt 4:128:4
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// %RANGE% TUNE_PREFER_POW2_BITS ppb 0:1:1
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// %RANGE% TUNE_WARP_LEVEL_THRESHOLD wlt 32:512:32
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// %RANGE% TUNE_BLOCK_LEVEL_THRESHOLD blt 1024:16384:512
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// %RANGE% TUNE_BLOCK_MAGIC_NS blns 0:2048:4
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// %RANGE% TUNE_BLOCK_DELAY_CONSTRUCTOR_ID bldcid 0:7:1
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// %RANGE% TUNE_BLOCK_L2_WRITE_LATENCY_NS bll2w 0:1200:5
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// %RANGE% TUNE_BUFF_MAGIC_NS buns 0:2048:4
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// %RANGE% TUNE_BUFF_DELAY_CONSTRUCTOR_ID budcid 0:7:1
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// %RANGE% TUNE_BUFF_L2_WRITE_LATENCY_NS bul2w 0:1200:5
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#include <thrust/random.h>
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#include <thrust/scan.h>
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#include <thrust/scatter.h>
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#include <thrust/sequence.h>
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#include <thrust/shuffle.h>
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#include <thrust/tabulate.h>
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#include <nvbench_helper.cuh>
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template <class T, class OffsetT>
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struct offset_to_ptr_t
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{
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T* d_ptr;
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OffsetT* d_offsets;
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__device__ T* operator()(OffsetT i) const
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{
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return d_ptr + d_offsets[i];
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}
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};
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template <class T, class OffsetT>
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struct reordered_offset_to_ptr_t
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{
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T* d_ptr;
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OffsetT* d_map;
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OffsetT* d_offsets;
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__device__ T* operator()(OffsetT i) const
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{
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return d_ptr + d_offsets[d_map[i]];
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}
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};
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template <class T, class OffsetT>
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struct offset_to_bytes_t
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{
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OffsetT* d_offsets;
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__device__ OffsetT operator()(OffsetT i) const
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{
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return (d_offsets[i + 1] - d_offsets[i]) * sizeof(T);
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}
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};
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template <class T, class OffsetT>
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struct offset_to_size_t
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{
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OffsetT* d_offsets;
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__device__ OffsetT operator()(OffsetT i) const
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{
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return d_offsets[i + 1] - d_offsets[i];
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}
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};
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#if !TUNE_BASE
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struct policy_selector_t
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{
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[[nodiscard]] _CCCL_HOST_DEVICE constexpr auto operator()(cuda::compute_capability) const -> cub::BatchedCopyPolicy
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{
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return {
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cub::BatchedCopyAlgorithm::lookback,
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{
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{
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TUNE_THREADS,
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TUNE_BUFFERS_PER_THREAD,
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TUNE_TLEV_BYTES_PER_THREAD,
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bool{TUNE_PREFER_POW2_BITS},
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TUNE_LARGE_THREADS * TUNE_LARGE_BUFFER_BYTES_PER_THREAD,
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TUNE_WARP_LEVEL_THRESHOLD,
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TUNE_BLOCK_LEVEL_THRESHOLD,
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cub::LookbackDelayPolicy{static_cast<cub::LookbackDelayAlgorithm>(TUNE_BUFF_DELAY_CONSTRUCTOR_ID),
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TUNE_BUFF_MAGIC_NS,
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TUNE_BUFF_L2_WRITE_LATENCY_NS},
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cub::LookbackDelayPolicy{static_cast<cub::LookbackDelayAlgorithm>(TUNE_BLOCK_DELAY_CONSTRUCTOR_ID),
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TUNE_BLOCK_MAGIC_NS,
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TUNE_BLOCK_L2_WRITE_LATENCY_NS},
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},
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{TUNE_LARGE_THREADS, TUNE_LARGE_BUFFER_BYTES_PER_THREAD},
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},
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};
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}
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};
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#endif
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template <class T, class OffsetT>
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void gen_it(T* d_buffer,
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thrust::device_vector<T*>& output,
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thrust::device_vector<OffsetT> offsets,
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bool randomize,
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thrust::default_random_engine& rne)
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{
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OffsetT* d_offsets = thrust::raw_pointer_cast(offsets.data());
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if (randomize)
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{
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const auto buffers = output.size();
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thrust::device_vector<OffsetT> map(buffers);
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thrust::sequence(map.begin(), map.end());
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thrust::shuffle(map.begin(), map.end(), rne);
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thrust::device_vector<OffsetT> sizes(buffers);
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thrust::tabulate(sizes.begin(), sizes.end(), offset_to_size_t<T, OffsetT>{d_offsets});
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thrust::scatter(sizes.begin(), sizes.end(), map.begin(), offsets.begin());
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thrust::exclusive_scan(offsets.begin(), offsets.end(), offsets.begin());
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OffsetT* d_map = thrust::raw_pointer_cast(map.data());
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thrust::tabulate(output.begin(), output.end(), reordered_offset_to_ptr_t<T, OffsetT>{d_buffer, d_map, d_offsets});
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}
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else
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{
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thrust::tabulate(output.begin(), output.end(), offset_to_ptr_t<T, OffsetT>{d_buffer, d_offsets});
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}
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}
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template <class T, class OffsetT>
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void copy(nvbench::state& state,
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nvbench::type_list<T, OffsetT>,
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std::size_t elements,
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std::size_t min_buffer_size,
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std::size_t max_buffer_size,
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bool randomize_input,
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bool randomize_output)
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{
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using offset_t = OffsetT;
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using it_t = T*;
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using input_buffer_it_t = it_t*;
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using output_buffer_it_t = it_t*;
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using buffer_size_it_t = offset_t*;
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thrust::device_vector<T> input_buffer = generate(elements);
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thrust::device_vector<T> output_buffer(elements);
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thrust::device_vector<offset_t> offsets =
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generate.uniform.segment_offsets(elements, min_buffer_size, max_buffer_size);
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T* d_input_buffer = thrust::raw_pointer_cast(input_buffer.data());
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T* d_output_buffer = thrust::raw_pointer_cast(output_buffer.data());
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offset_t* d_offsets = thrust::raw_pointer_cast(offsets.data());
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const auto buffers = offsets.size() - 1;
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thrust::device_vector<it_t> input_buffers(buffers);
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thrust::device_vector<it_t> output_buffers(buffers);
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thrust::device_vector<offset_t> buffer_sizes(buffers);
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thrust::tabulate(buffer_sizes.begin(), buffer_sizes.end(), offset_to_bytes_t<T, offset_t>{d_offsets});
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thrust::default_random_engine rne;
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gen_it(d_input_buffer, input_buffers, offsets, randomize_input, rne);
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gen_it(d_output_buffer, output_buffers, offsets, randomize_output, rne);
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// Clear the offsets vector to free memory
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offsets.clear();
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offsets.shrink_to_fit();
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d_offsets = nullptr;
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input_buffer_it_t d_input_buffers = thrust::raw_pointer_cast(input_buffers.data());
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output_buffer_it_t d_output_buffers = thrust::raw_pointer_cast(output_buffers.data());
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buffer_size_it_t d_buffer_sizes = thrust::raw_pointer_cast(buffer_sizes.data());
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state.add_element_count(elements);
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state.add_global_memory_writes<T>(elements);
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state.add_global_memory_reads<T>(elements);
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state.add_global_memory_reads<it_t>(buffers);
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state.add_global_memory_reads<it_t>(buffers);
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state.add_global_memory_reads<offset_t>(buffers);
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caching_allocator_t alloc;
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state.exec(nvbench::exec_tag::gpu | nvbench::exec_tag::no_batch | nvbench::exec_tag::sync,
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[&](nvbench::launch& launch) {
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auto env = cub_bench_env(
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alloc,
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launch
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#if !TUNE_BASE
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,
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cuda::execution::tune(policy_selector_t{})
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#endif
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);
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_CCCL_TRY_CUDA_API(
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cub::DeviceMemcpy::Batched,
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"Batched failed",
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d_input_buffers,
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d_output_buffers,
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d_buffer_sizes,
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static_cast<cuda::std::int64_t>(buffers),
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env);
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});
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}
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template <class T, class OffsetT>
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void uniform(nvbench::state& state, nvbench::type_list<T, OffsetT> tl)
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{
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const auto elements = static_cast<std::size_t>(state.get_int64("Elements{io}"));
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const auto max_buffer_size = static_cast<std::size_t>(state.get_int64("MaxBufferSize"));
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const auto min_buffer_size_ratio = static_cast<std::size_t>(state.get_int64("MinBufferSizeRatio"));
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const auto min_buffer_size =
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static_cast<std::size_t>(static_cast<double>(max_buffer_size) / 100.0) * min_buffer_size_ratio;
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copy(
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state, tl, elements, min_buffer_size, max_buffer_size, state.get_int64("Randomize"), state.get_int64("Randomize"));
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}
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template <class T, class OffsetT>
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void large(nvbench::state& state, nvbench::type_list<T, OffsetT> tl)
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{
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const auto elements = static_cast<std::size_t>(state.get_int64("Elements{io}"));
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const auto max_buffer_size = elements;
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constexpr auto min_buffer_size_ratio = 99;
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const auto min_buffer_size =
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static_cast<std::size_t>(static_cast<double>(max_buffer_size) / 100.0) * min_buffer_size_ratio;
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// No need to randomize large buffers
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constexpr bool randomize_input = false;
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constexpr bool randomize_output = false;
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copy(state, tl, elements, min_buffer_size, max_buffer_size, randomize_input, randomize_output);
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}
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using types = nvbench::type_list<nvbench::uint8_t, nvbench::uint32_t>;
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NVBENCH_BENCH_TYPES(uniform, NVBENCH_TYPE_AXES(types, offset_types))
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.set_name("uniform")
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.set_type_axes_names({"T{ct}", "OffsetT{ct}"})
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.add_int64_power_of_two_axis("Elements{io}", nvbench::range(25, 29, 2))
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.add_int64_axis("MinBufferSizeRatio", {1, 99})
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.add_int64_axis("MaxBufferSize", {8, 64, 256, 1024, 64 * 1024})
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.add_int64_axis("Randomize", {0, 1});
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NVBENCH_BENCH_TYPES(large, NVBENCH_TYPE_AXES(types, offset_types))
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.set_name("large")
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.set_type_axes_names({"T{ct}", "OffsetT{ct}"})
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.add_int64_power_of_two_axis("Elements{io}", {28, 29});
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