CCCL (CUDA C++ Core Libraries) provides: - CUB: device/block/warp-level GPU primitives (reduce, scan, sort, topk) - Thrust: high-level parallel algorithms (transform_reduce, sort, scan) - libcudacxx: CUDA C++ standard library (atomics, barriers, memory) - cudax: experimental features (memory resources, allocators) - Tuning policies: per-SM hardware-specific algorithm parameters Competition optimization vectors mapped to CCCL: - Output TPS (83% weight): warp_reduce, block_reduce, device_topk - Input TPS (14% weight): device_scan, block_load, prefetch - Cache TPS (3% weight): prefix caching strategy patterns - Memory (0.9 util): pooled/cached/buddy allocators Source: https://github.com/NVIDIA/cccl (shallow clone, HEAD only) License: Apache-2.0
484 lines
15 KiB
Plaintext
484 lines
15 KiB
Plaintext
// SPDX-FileCopyrightText: Copyright (c) 2011, Duane Merrill. All rights reserved.
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// SPDX-FileCopyrightText: Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved.
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// SPDX-License-Identifier: BSD-3
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/**
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* \file
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* PTX intrinsics
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*/
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#pragma once
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#include <cub/config.cuh>
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#if defined(_CCCL_IMPLICIT_SYSTEM_HEADER_GCC)
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# pragma GCC system_header
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#elif defined(_CCCL_IMPLICIT_SYSTEM_HEADER_CLANG)
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# pragma clang system_header
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#elif defined(_CCCL_IMPLICIT_SYSTEM_HEADER_MSVC)
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# pragma system_header
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#endif // no system header
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#include <cub/util_debug.cuh>
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#include <cub/util_type.cuh>
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#include <cuda/__cmath/pow2.h>
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CUB_NAMESPACE_BEGIN
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/******************************************************************************
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* Inlined PTX intrinsics
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******************************************************************************/
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#ifndef _CCCL_DOXYGEN_INVOKED // Do not document
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/**
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* Bitfield-extract.
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*/
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template <typename UnsignedBits, int BYTE_LEN>
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//! deprecated [Since 3.0]
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CCCL_DEPRECATED_BECAUSE("Use cuda::bitfield_extract()") _CCCL_DEVICE _CCCL_FORCEINLINE unsigned int
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BFE(UnsignedBits source, unsigned int bit_start, unsigned int num_bits, detail::constant_t<BYTE_LEN> /*byte_len*/)
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{
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unsigned int bits;
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asm("bfe.u32 %0, %1, %2, %3;" : "=r"(bits) : "r"((unsigned int) source), "r"(bit_start), "r"(num_bits));
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return bits;
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}
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/**
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* Bitfield-extract for 64-bit types.
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*/
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template <typename UnsignedBits>
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//! deprecated [Since 3.0]
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CCCL_DEPRECATED_BECAUSE("Use cuda::bitfield_extract()") _CCCL_DEVICE _CCCL_FORCEINLINE unsigned int
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BFE(UnsignedBits source, unsigned int bit_start, unsigned int num_bits, detail::constant_t<8> /*byte_len*/)
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{
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const unsigned long long MASK = (1ull << num_bits) - 1;
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return (source >> bit_start) & MASK;
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}
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# if _CCCL_HAS_INT128()
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/**
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* Bitfield-extract for 128-bit types.
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*/
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template <typename UnsignedBits>
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//! deprecated [Since 3.0]
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CCCL_DEPRECATED_BECAUSE("Use cuda::bitfield_extract()") _CCCL_DEVICE _CCCL_FORCEINLINE unsigned int
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BFE(UnsignedBits source, unsigned int bit_start, unsigned int num_bits, detail::constant_t<16> /*byte_len*/)
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{
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const __uint128_t MASK = (__uint128_t{1} << num_bits) - 1;
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return (source >> bit_start) & MASK;
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}
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# endif
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#endif // _CCCL_DOXYGEN_INVOKED
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/**
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* \brief Bitfield-extract. Extracts \p num_bits from \p source starting at bit-offset \p bit_start. The input \p
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* source may be an 8b, 16b, 32b, or 64b unsigned integer type.
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*/
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template <typename UnsignedBits>
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//! deprecated [Since 3.0]
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CCCL_DEPRECATED_BECAUSE("Use cuda::bitfield_extract()") _CCCL_DEVICE _CCCL_FORCEINLINE unsigned int
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BFE(UnsignedBits source, unsigned int bit_start, unsigned int num_bits)
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{
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return BFE(source, bit_start, num_bits, detail::constant_v<int{sizeof(UnsignedBits)}>);
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}
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#ifndef _CCCL_DOXYGEN_INVOKED // Do not document
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/**
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* Warp synchronous shfl_up
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*/
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_CCCL_DEVICE _CCCL_FORCEINLINE unsigned int
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SHFL_UP_SYNC(unsigned int word, int src_offset, int flags, unsigned int member_mask)
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{
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asm volatile("shfl.sync.up.b32 %0, %1, %2, %3, %4;"
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: "=r"(word)
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: "r"(word), "r"(src_offset), "r"(flags), "r"(member_mask));
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return word;
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}
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/**
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* Warp synchronous shfl_down
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*/
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_CCCL_DEVICE _CCCL_FORCEINLINE unsigned int
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SHFL_DOWN_SYNC(unsigned int word, int src_offset, int flags, unsigned int member_mask)
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{
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asm volatile("shfl.sync.down.b32 %0, %1, %2, %3, %4;"
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: "=r"(word)
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: "r"(word), "r"(src_offset), "r"(flags), "r"(member_mask));
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return word;
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}
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#endif // _CCCL_DOXYGEN_INVOKED
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/**
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* \brief Terminates the calling thread
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*/
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_CCCL_DEVICE _CCCL_FORCEINLINE void ThreadExit()
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{
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asm volatile("exit;");
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}
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/**
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* \brief Returns the row-major linear thread identifier for a multidimensional thread block
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*/
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_CCCL_DEVICE _CCCL_FORCEINLINE int RowMajorTid(int block_dim_x, int block_dim_y, int block_dim_z)
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{
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return static_cast<int>(((block_dim_z == 1) ? 0 : (threadIdx.z * block_dim_x * block_dim_y))
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+ ((block_dim_y == 1) ? 0 : (threadIdx.y * block_dim_x)) + threadIdx.x);
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}
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/**
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* @brief Returns the warp mask for a warp of @p LOGICAL_WARP_THREADS threads
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*
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* @par
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* If the number of threads assigned to the virtual warp is not a power of two,
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* it's assumed that only one virtual warp exists.
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*
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* @tparam LOGICAL_WARP_THREADS <b>[optional]</b> The number of threads per
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* "logical" warp (may be less than the number of
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* hardware warp threads).
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* @param warp_id Id of virtual warp within architectural warp
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*/
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template <int LOGICAL_WARP_THREADS>
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_CCCL_HOST_DEVICE _CCCL_FORCEINLINE unsigned int WarpMask([[maybe_unused]] unsigned int warp_id)
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{
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constexpr bool is_pow_of_two = ::cuda::is_power_of_two(LOGICAL_WARP_THREADS);
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constexpr bool is_arch_warp = LOGICAL_WARP_THREADS == detail::warp_threads;
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unsigned int member_mask = 0xFFFFFFFFu >> (detail::warp_threads - LOGICAL_WARP_THREADS);
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if constexpr (is_pow_of_two && !is_arch_warp)
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{
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member_mask <<= warp_id * LOGICAL_WARP_THREADS;
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}
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return member_mask;
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}
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/**
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* @brief Shuffle-up for any data type.
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* Each <em>warp-lane<sub>i</sub></em> obtains the value @p input contributed by
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* <em>warp-lane</em><sub><em>i</em>-<tt>src_offset</tt></sub>.
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* For thread lanes @e i < src_offset, the thread's own @p input is returned to the thread.
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* 
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*
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* @tparam LOGICAL_WARP_THREADS
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* The number of threads per "logical" warp. Must be a power-of-two <= 32.
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*
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* @tparam T
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* <b>[inferred]</b> The input/output element type
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*
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* @par
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* - Available only for SM3.0 or newer
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*
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* @par Snippet
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* The code snippet below illustrates each thread obtaining a \p double value from the
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* predecessor of its predecessor.
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* @par
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* @code
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* #include <cub/cub.cuh> // or equivalently <cub/util_ptx.cuh>
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*
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* __global__ void ExampleKernel(...)
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* {
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* // Obtain one input item per thread
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* double thread_data = ...
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*
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* // Obtain item from two ranks below
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* double peer_data = ShuffleUp<32>(thread_data, 2, 0, 0xffffffff);
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*
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* @endcode
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* @par
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* Suppose the set of input @p thread_data across the first warp of threads is
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* <tt>{1.0, 2.0, 3.0, 4.0, 5.0, ..., 32.0}</tt>. The corresponding output @p peer_data will be
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* <tt>{1.0, 2.0, 1.0, 2.0, 3.0, ..., 30.0}</tt>.
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*
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* @param[in] input
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* The value to broadcast
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*
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* @param[in] src_offset
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* The relative down-offset of the peer to read from
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*
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* @param[in] first_thread
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* Index of first lane in logical warp (typically 0)
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*
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* @param[in] member_mask
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* 32-bit mask of participating warp lanes
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*/
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template <int LOGICAL_WARP_THREADS, typename T>
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_CCCL_DEVICE _CCCL_FORCEINLINE T ShuffleUp(T input, int src_offset, int first_thread, unsigned int member_mask)
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{
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/// The 5-bit SHFL mask for logically splitting warps into sub-segments starts 8-bits up
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constexpr int SHFL_C = (32 - LOGICAL_WARP_THREADS) << 8;
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using ShuffleWord = typename UnitWord<T>::ShuffleWord;
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constexpr int WORDS = (sizeof(T) + sizeof(ShuffleWord) - 1) / sizeof(ShuffleWord);
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T output;
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ShuffleWord* output_alias = reinterpret_cast<ShuffleWord*>(&output);
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ShuffleWord* input_alias = reinterpret_cast<ShuffleWord*>(&input);
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unsigned int shuffle_word;
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shuffle_word = SHFL_UP_SYNC((unsigned int) input_alias[0], src_offset, first_thread | SHFL_C, member_mask);
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output_alias[0] = shuffle_word;
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_CCCL_PRAGMA_UNROLL_FULL()
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for (int WORD = 1; WORD < WORDS; ++WORD)
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{
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shuffle_word = SHFL_UP_SYNC((unsigned int) input_alias[WORD], src_offset, first_thread | SHFL_C, member_mask);
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output_alias[WORD] = shuffle_word;
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}
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return output;
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}
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/**
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* @brief Shuffle-down for any data type.
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* Each <em>warp-lane<sub>i</sub></em> obtains the value @p input contributed by
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* <em>warp-lane</em><sub><em>i</em>+<tt>src_offset</tt></sub>.
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* For thread lanes @e i >= WARP_THREADS, the thread's own @p input is returned to the
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* thread. 
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*
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* @tparam LOGICAL_WARP_THREADS
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* The number of threads per "logical" warp. Must be a power-of-two <= 32.
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*
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* @tparam T
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* <b>[inferred]</b> The input/output element type
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*
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* @par
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* - Available only for SM3.0 or newer
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*
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* @par Snippet
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* The code snippet below illustrates each thread obtaining a @p double value from the
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* successor of its successor.
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* @par
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* @code
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* #include <cub/cub.cuh> // or equivalently <cub/util_ptx.cuh>
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*
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* __global__ void ExampleKernel(...)
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* {
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* // Obtain one input item per thread
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* double thread_data = ...
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*
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* // Obtain item from two ranks below
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* double peer_data = ShuffleDown<32>(thread_data, 2, 31, 0xffffffff);
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*
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* @endcode
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* @par
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* Suppose the set of input @p thread_data across the first warp of threads is
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* <tt>{1.0, 2.0, 3.0, 4.0, 5.0, ..., 32.0}</tt>.
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* The corresponding output @p peer_data will be
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* <tt>{3.0, 4.0, 5.0, 6.0, 7.0, ..., 32.0}</tt>.
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*
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* @param[in] input
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* The value to broadcast
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*
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* @param[in] src_offset
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* The relative up-offset of the peer to read from
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*
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* @param[in] last_thread
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* Index of last thread in logical warp (typically 31 for a 32-thread warp)
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*
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* @param[in] member_mask
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* 32-bit mask of participating warp lanes
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*/
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template <int LOGICAL_WARP_THREADS, typename T>
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_CCCL_DEVICE _CCCL_FORCEINLINE T ShuffleDown(T input, int src_offset, int last_thread, unsigned int member_mask)
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{
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/// The 5-bit SHFL mask for logically splitting warps into sub-segments starts 8-bits up
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static constexpr int SHFL_C = (32 - LOGICAL_WARP_THREADS) << 8;
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using ShuffleWord = typename UnitWord<T>::ShuffleWord;
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constexpr int WORDS = (sizeof(T) + sizeof(ShuffleWord) - 1) / sizeof(ShuffleWord);
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T output;
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ShuffleWord* output_alias = reinterpret_cast<ShuffleWord*>(&output);
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ShuffleWord* input_alias = reinterpret_cast<ShuffleWord*>(&input);
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unsigned int shuffle_word;
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shuffle_word = SHFL_DOWN_SYNC((unsigned int) input_alias[0], src_offset, last_thread | SHFL_C, member_mask);
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output_alias[0] = shuffle_word;
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_CCCL_PRAGMA_UNROLL_FULL()
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for (int WORD = 1; WORD < WORDS; ++WORD)
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{
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shuffle_word = SHFL_DOWN_SYNC((unsigned int) input_alias[WORD], src_offset, last_thread | SHFL_C, member_mask);
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output_alias[WORD] = shuffle_word;
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}
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return output;
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}
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/**
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* @brief Shuffle-broadcast for any data type.
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* Each <em>warp-lane<sub>i</sub></em> obtains the value @p input
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* contributed by <em>warp-lane</em><sub><tt>src_lane</tt></sub>.
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* For @p src_lane < 0 or @p src_lane >= WARP_THREADS,
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* then the thread's own @p input is returned to the thread.
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* 
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*
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* @tparam LOGICAL_WARP_THREADS
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* The number of threads per "logical" warp. Must be a power-of-two <= 32.
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*
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* @tparam T
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* <b>[inferred]</b> The input/output element type
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*
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* @par
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* - Available only for SM3.0 or newer
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*
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* @par Snippet
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* The code snippet below illustrates each thread obtaining a @p double value from
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* <em>warp-lane</em><sub>0</sub>.
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*
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* @par
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* @code
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* #include <cub/cub.cuh> // or equivalently <cub/util_ptx.cuh>
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*
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* __global__ void ExampleKernel(...)
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* {
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* // Obtain one input item per thread
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* double thread_data = ...
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*
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* // Obtain item from thread 0
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* double peer_data = ShuffleIndex<32>(thread_data, 0, 0xffffffff);
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*
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* @endcode
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* @par
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* Suppose the set of input @p thread_data across the first warp of threads is
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* <tt>{1.0, 2.0, 3.0, 4.0, 5.0, ..., 32.0}</tt>.
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* The corresponding output @p peer_data will be
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* <tt>{1.0, 1.0, 1.0, 1.0, 1.0, ..., 1.0}</tt>.
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*
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* @param[in] input
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* The value to broadcast
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*
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* @param[in] src_lane
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* Which warp lane is to do the broadcasting
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*
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* @param[in] member_mask
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* 32-bit mask of participating warp lanes
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*/
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template <int LOGICAL_WARP_THREADS, typename T>
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_CCCL_DEVICE _CCCL_FORCEINLINE T ShuffleIndex(T input, int src_lane, unsigned int member_mask)
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{
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using ShuffleWord = typename UnitWord<T>::ShuffleWord;
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constexpr int WORDS = (sizeof(T) + sizeof(ShuffleWord) - 1) / sizeof(ShuffleWord);
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T output;
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ShuffleWord* output_alias = reinterpret_cast<ShuffleWord*>(&output);
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ShuffleWord* input_alias = reinterpret_cast<ShuffleWord*>(&input);
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unsigned int shuffle_word;
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shuffle_word = __shfl_sync(member_mask, (unsigned int) input_alias[0], src_lane, LOGICAL_WARP_THREADS);
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output_alias[0] = shuffle_word;
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_CCCL_PRAGMA_UNROLL_FULL()
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for (int WORD = 1; WORD < WORDS; ++WORD)
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{
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shuffle_word = __shfl_sync(member_mask, (unsigned int) input_alias[WORD], src_lane, LOGICAL_WARP_THREADS);
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output_alias[WORD] = shuffle_word;
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}
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return output;
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}
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#ifndef _CCCL_DOXYGEN_INVOKED // Do not document
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namespace detail
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{
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/**
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* Implementation detail for `MatchAny`. It provides specializations for full and partial warps.
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* For partial warps, inactive threads must be masked out. This is done in the partial warp
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* specialization below.
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* Usage:
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* ```
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* // returns a mask of threads with the same 4 least-significant bits of `label`
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* // in a warp with 16 active threads
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* warp_matcher_t<4, 16>::match_any(label);
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*
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* // returns a mask of threads with the same 4 least-significant bits of `label`
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* // in a warp with 32 active threads (no extra work is done)
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* warp_matcher_t<4, 32>::match_any(label);
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* ```
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*/
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template <int LABEL_BITS, int WARP_ACTIVE_THREADS>
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struct warp_matcher_t
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{
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static _CCCL_DEVICE unsigned int match_any(unsigned int label)
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{
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return warp_matcher_t<LABEL_BITS, 32>::match_any(label) & ~(~0 << WARP_ACTIVE_THREADS);
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}
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};
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template <int LABEL_BITS>
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struct warp_matcher_t<LABEL_BITS, warp_threads>
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{
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// match.any.sync.b32 is slower when matching a few bits
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// using a ballot loop instead
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static _CCCL_DEVICE unsigned int match_any(unsigned int label)
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{
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unsigned int retval;
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// Extract masks of common threads for each bit
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_CCCL_PRAGMA_UNROLL_FULL()
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for (int BIT = 0; BIT < LABEL_BITS; ++BIT)
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{
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unsigned int mask;
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unsigned int current_bit = 1 << BIT;
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asm("{\n"
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" .reg .pred p;\n"
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" and.b32 %0, %1, %2;"
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" setp.ne.u32 p, %0, 0;\n"
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" vote.ballot.sync.b32 %0, p, 0xffffffff;\n"
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" @!p not.b32 %0, %0;\n"
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"}\n"
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: "=r"(mask)
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: "r"(label), "r"(current_bit));
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// Remove peers who differ
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retval = (BIT == 0) ? mask : retval & mask;
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}
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return retval;
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}
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};
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/**
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* @brief Shifts @p val left by the amount specified by unsigned 32-bit value in @p num_bits. If @p
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* num_bits is larger than 32 bits, @p num_bits is clamped to 32.
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*/
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_CCCL_DEVICE _CCCL_FORCEINLINE uint32_t LogicShiftLeft(uint32_t val, uint32_t num_bits)
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{
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uint32_t ret{};
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asm("shl.b32 %0, %1, %2;" : "=r"(ret) : "r"(val), "r"(num_bits));
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return ret;
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}
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/**
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* @brief Shifts @p val right by the amount specified by unsigned 32-bit value in @p num_bits. If @p
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* num_bits is larger than 32 bits, @p num_bits is clamped to 32.
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*/
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_CCCL_DEVICE _CCCL_FORCEINLINE uint32_t LogicShiftRight(uint32_t val, uint32_t num_bits)
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{
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uint32_t ret{};
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asm("shr.b32 %0, %1, %2;" : "=r"(ret) : "r"(val), "r"(num_bits));
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return ret;
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}
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} // namespace detail
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#endif // _CCCL_DOXYGEN_INVOKED
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|
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/**
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* Compute a 32b mask of threads having the same least-significant
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* LABEL_BITS of \p label as the calling thread.
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|
*/
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template <int LABEL_BITS, int WARP_ACTIVE_THREADS = detail::warp_threads>
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inline _CCCL_DEVICE unsigned int MatchAny(unsigned int label)
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|
{
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return detail::warp_matcher_t<LABEL_BITS, WARP_ACTIVE_THREADS>::match_any(label);
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}
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CUB_NAMESPACE_END
|