Files
project_6/vllm/model_executor
Claude 4eb83a7ee4 [BASE] activation.py SiluAndMul: CCCL dispatch_transform CacheAsyncConfiguration output tensor caching
Source: cccl_upstream/cub/cub/device/dispatch/dispatch_transform.cuh
Target: vllm/model_executor/layers/activation.py

CCCL system design applied:
- dispatch_transform.cuh CacheAsyncConfiguration: cache occupancy/config
  results across calls to avoid recomputation
- Applied: cache output tensor when shape/dtype/device unchanged
- BI-V100 has no async allocator → cudaMalloc is synchronous → caching
  avoids blocking the stream on every decode step
- spread_out_items_per_thread: dynamic tile adjustment for occupancy
  → we only cache for stable decode shapes, not variable prefill
2026-08-06 04:17:59 +00:00
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