Claude
10af71357b
[CCCL-PORT] Two architecture-level optimizations from CCCL system design
Source CCCL files read as input:
- cub/block/block_scan.cuh (RAKING algorithm concept)
- cub/device/dispatch/dispatch_reduce.cuh (GridEvenShare, two-pass)
- cub/agent/agent_reduce.cuh (vectorized vs scalar load paths)
- thrust/examples/histogram.cu (sort + reduce_by_key pattern)
- thrust/examples/scan_by_key.cu (keyed scan for state propagation)
Optimization 1: DeltaNet chunk kernel — solve_triangular replaces for-loop
63 Python iterations → 1 CUDA kernel (lower-triangular system solve)
Optimization 2: MoE prefill — sort tokens by expert_id for contiguous gather
CCCL histogram pattern: sort → segment → batched process
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