9ca33cf4d5
Sources (all CUDA 10.2 compatible, no CUTLASS/Triton dependency): - leimao/CUDA-GEMM-Optimization: v00-v07, fp16 WMMA variant, double buffered - siboehm/SGEMM_CUDA: kernel 1-12, warp tiling + double buffering - wangzyon/NVIDIA_SGEMM_PRACTICE: kernel 1-7 - edtallison/sgemm-cuda: kernel 1-12 (reimplementation with notes) Key porting issue: ALL kernels hardcode WARPSIZE=32. BI-V100 has warp_size=64. Need to: 1. Replace all 32U / WARPSIZE constants with 64 2. Adjust warp subtile decomposition (WMITER, WNITER, WSUBM, WSUBN) 3. Adjust shared memory bank conflict avoidance (may have different bank count) 4. Test __shfl_down_sync with mask=0xFFFFFFFFFFFFFFFF (64-bit)
76 lines
2.7 KiB
Plaintext
76 lines
2.7 KiB
Plaintext
#pragma once
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#include <cuda_runtime.h>
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#include <cublas_v2.h>
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#include <stdio.h>
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#include <stdlib.h>
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template<const int BM,
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const int BN,
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const int BK,
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const int TM,
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const int TN>
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__global__ void mysgemm_v4(int M, int N, int K, float alpha, float *A, float *B, float beta, float *C) {
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int bx = blockIdx.x;
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int by = blockIdx.y;
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int block_row_thread = BN / TN;
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int block_col_thread = BM / TM;
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int thread_num = block_row_thread * block_col_thread; // 一个线程负责计算block中TM*TN个元素
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int tx = (threadIdx.x % block_row_thread) * TN;
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int ty = (threadIdx.x / block_row_thread) * TM;
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__shared__ float As[BM * BK];
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__shared__ float Bs[BK * BN];
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// 移动到当前block
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A = &A[by * BM * K];
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B = &B[bx * BN];
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C = &C[by * BM * N + bx * BN];
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/*
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当前线程负责搬运全局内存中第a_tile_row行，第a_tile_col列元素至共享内存第a_tile_row行，第a_tile_col列
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a_tile_stride表示block中线程可搬运a_tile_stride行至共享内存；
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若BM=64,BK=8,thread_num=512,则a_tile_stride=64,a_tile_stride=BM，表示每个线程搬运一轮即可完成所需元素的搬运;
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若BM=128,BK=8,thread_num=512,则a_tile_stride=64,表示每个线程搬运两轮即可完成所需元素的搬运;
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*/
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int a_tile_row = threadIdx.x / BK;
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int a_tile_col = threadIdx.x % BK;
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int a_tile_stride = thread_num / BK;
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int b_tile_row = threadIdx.x / BN;
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int b_tile_col = threadIdx.x % BN;
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int b_tile_stride = thread_num / BN;
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float tmp[TM][TN] = {0.}; // 每个线程负责TM*TN个元素，则需要申请TM*TN个寄存器保存累加值，额外的一个寄存器用于缓存；
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#pragma unroll
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for (int k = 0; k < K; k += BK) {
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#pragma unroll
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for (int i = 0; i < BM; i += a_tile_stride) {
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As[(a_tile_row + i) * BK + a_tile_col] = A[(a_tile_row + i) * K + a_tile_col];
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}
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#pragma unroll
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for (int i = 0; i < BK; i += b_tile_stride) {
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Bs[(b_tile_row + i) * BN + b_tile_col] = B[(b_tile_row + i) * N + b_tile_col];
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}
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__syncthreads();
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A += BK;
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B += BK * N;
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#pragma unroll
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for (int i = 0; i < BK; i++) {
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#pragma unroll // 循环展开，增加指令并行度
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for (int j = 0; j < TM; j++) {
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for (int l = 0; l < TN; l++)
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tmp[j][l] += As[(ty + j) * BK + i] * Bs[tx + l + i * BN];
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}
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}
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__syncthreads();
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}
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#pragma unroll
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for (int j = 0; j < TM; j++) {
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for (int l = 0; l < TN; l++)
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C[(ty + j) * N + tx + l] = alpha * tmp[j][l] + beta * C[(ty + j) * N + tx + l];
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}
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} |