Commit Graph

4 Commits

Author SHA1 Message Date
Claude
6d8de852ad [OPT] head_dim=256 Triton support — BLOCK=32 for Qwen3.6
CRITICAL DISCOVERY: Qwen3.6-35B-A3B uses head_dim=256 (not 128).
  text_cfg.head_dim=256, num_heads=24, num_kv_heads=4, GQA=6

This means ALL previous SMEM calculations were wrong:
  BLOCK=64 + head_dim=256: 64×256×2×2 = 64KB > 48KB → OVERFLOW
  BLOCK=64 + head_dim=128: 64×128×2×2 = 32KB ≤ 48KB → OK (but wrong model)

Fix: head_dim-dependent BLOCK selection in prefix_prefill.py:
  head_dim ≤ 128: BLOCK=64, NUM_WARPS=4 (32KB SMEM)
  head_dim = 256: BLOCK=32, NUM_WARPS=4 (32KB SMEM)
  head_dim > 256: BLOCK=16, NUM_WARPS=2 (16KB SMEM)

Also: _Q_CHUNK in _run_sdpa_fallback reduced 256→128 for head_dim=256
to avoid OOM on long sequences (256×100K×24×4=2.3GB vs 128×100K×24×4=1.2GB).

Without this patch, Triton prefill CANNOT work for Qwen3.6.
patch_enable_triton.py's try/fallback would always fall back to PyTorch.
2026-07-30 16:05:01 +00:00
dylanyunlon
638858a317 [OPT] Enable Triton prefill + raise decode threshold — the actual performance work
Two optimizations that target the real bottlenecks:

1. patch_enable_triton.py: Enable Triton Flash Attention for prefill
   - Sets HAS_TRITON = True (was hardcoded False)
   - Adds try/except wrapper in forward_prefix: tries Triton kernel first,
     permanently falls back to PyTorch if it hangs or errors
   - Combined with patch_triton_tuning.py (BLOCK=64, NUM_WARPS=4),
     this keeps SMEM at 32KB ≤ 48KB limit
   - If Triton works: 10-50x prefill speedup (GPU-parallel Flash Attention
     vs Python for-loop)
   - If Triton still hangs: auto-fallback, no worse than baseline

2. patch_vectorized_decode.py: Raise _PYTORCH_DECODE_THRESHOLD 32768 → 65536
   - Compiled ixf_F.paged_attention_v1 is ~100x faster than Python fallback
   - Baseline conservatively falls back at 32K, may work fine at 64K
   - If v1 crashes at higher seq_lens, threshold can be lowered back

Why these matter (competition scoring):
  Token吞吐加权值 = Output TPS × 16.796 + Input TPS × 2.799 + Cache TPS × 0.56

  Prefill (Input TPS, 14% weight): _forward_prefix_pytorch is a Python
  for-loop doing matmul+softmax per tile. Triton kernel does this in a
  single GPU launch with Flash Attention online softmax.

  Decode (Output TPS, 83% weight): Every seq_len between 32K-65K that
  stays on compiled v1 instead of falling to Python saves ~100x per token.

Deploy order in Dockerfile:
  1. patch_ops.sh (baseline functional patches)
  2. patch_triton_tuning.py (BLOCK=64, NUM_WARPS=4)
  3. patch_enable_triton.py (HAS_TRITON=True + try/fallback)
  4. patch_vectorized_decode.py (threshold 32K → 64K)
2026-07-30 15:41:25 +00:00
Claude
9cb7f9d037 [OPT] PagedAttention V2 implementation — fill the NotImplementedError hole
The single biggest performance bottleneck in the baseline:
paged_attention_v2 = raise NotImplementedError()
paged_attn.py: use_v1 = True (hardcoded to avoid calling V2)

V1 limitation: processes entire KV sequence in one kernel launch.
For seq_len=100K, this is a single massive attention computation.
V2: splits into PARTITION_SIZE=512 chunks, runs them in parallel,
then reduces with log-sum-exp. 195 parallel partitions vs 1.

Implementation (paged_attention_v2_pytorch.py):
  Phase 1: Per-partition attention
    - For each (seq, head, partition): compute QK^T, softmax, weighted V sum
    - Store partial: tmp_output, exp_sums, max_logits (per partition)
  Phase 2: Cross-partition reduction (log-sum-exp)
    - global_max = max(max_logits across partitions)
    - rescale = exp(partition_max - global_max) × partition_exp_sum
    - output = Σ (rescale / total_sum) × partition_output

This is the same algorithm as vllm's paged_attention_v2_kernel.cu:
  - The reduction pattern is identical to CCCL's block_reduce_warp_reductions
    (combine partial statistics from independent segments)
  - The online softmax tiling is the same as Flash Attention's partitioning

Integration:
  - patch_paged_attention_v2.py patches _custom_ops.py and paged_attn.py
  - Removes use_v1=True hardcode → V2 used for seq_len > 8192
  - Dockerfile adds the patch step

This is a PyTorch implementation (no CUDA compilation needed).
Next step: if /usr/local/corex/ has ixcc or nvcc-compatible compiler,
replace with compiled CUDA kernel for further speedup.
2026-07-30 15:40:14 +00:00
Claude
4463e9ccee [OPT] BI-V100 Triton kernel tuning + computility-run.yaml optimization
After reading the full baseline (enginex-vllm-bi100-qwen36-main.zip):

KEY DISCOVERY: The competition optimization surface is Python/Triton,
not C++ CUDA. There is no csrc/ directory. All CUDA kernels are
precompiled in vllm._C and ixformer .so files. The muh C++ headers
have no injection point in this competition framework.

What CAN be optimized:

1. Triton kernel parameters (prefix_prefill.py):
   - BLOCK: stays at 64 (correct — BLOCK_N=128 overflows 48KB SMEM
     at head_dim=128: 128×128×2×2=64KB > 48KB)
   - NUM_WARPS: 8 → 4 (derived from occupancy analysis:
     at 8 warps + 32KB SMEM/block, only 1 block fits per SM;
     at 4 warps, potentially 2 blocks per SM = 2× occupancy;
     BI-V100 is bandwidth-limited (900GB/s), so more blocks
     hiding bandwidth latency matters more than more warps
     hiding instruction latency)

2. computility-run.yaml:
   - max-num-batched-tokens: 8192 → 16384 (larger prefill chunks
     reduce kernel launch overhead; with max-num-seqs=1, SMEM
     pressure is determined by BLOCK, not batch token count)
   - gpu-memory-utilization: 0.9 → 0.95 (model uses ~17.5GB/GPU,
     KV cache for 100K tokens ≈ 1.38GB, plenty of headroom)

3. Added Dockerfile with patch_triton_tuning.py step.

4. Analysis document in optimizations/prefix_prefill_patch.py
   with full SMEM/register/occupancy derivation.
2026-07-30 15:33:44 +00:00