Claude
a2a5dd8f00
feat: asymmetric BLOCK_M/BLOCK_N search + re-add BI-V100 autotune configs
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bench_triton_prefill.py:
- Split --block into --block (BLOCK_M) and --block-n (BLOCK_N)
- Each (M, N, warps) combo triggers Triton JIT recompilation
- Enables finding asymmetric optima like M=64,N=32 that save SMEM
triton_flash_attention.py:
- Re-add 3 BI-V100 autotune configs (64x32, 32x64, 64x64 with warps=4)
- These were wrongly reverted in 8c1955d
2026-08-03 11:18:18 +00:00
dylanyunlon
8c1955dc92
fix: revert invalid patches, add honest tuning surface assessment
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REVERTED (invalid):
- paged_attn.py: restored use_v1=True hardcode. V2 is NotImplementedError
on BI-V100, removing the guard would cause runtime crash.
- fused_moe.py: BLOCK_SIZE_N/K changes reverted. ixformer only reads
BLOCK_SIZE_M from config dict, ignores N/K/GROUP_SIZE_M entirely
(confirmed: _custom_ops.py:774 only passes config['BLOCK_SIZE_M']).
- _custom_ops.py: SMEM change reverted pending hardware confirmation.
- triton_flash_attention.py: autotune configs reverted (will re-add properly).
- prefix_prefill.py: comment enhancement reverted (was harmless but noisy).
ADDED:
- TUNING_SURFACE_TRUTH.md: honest assessment of what's actually tunable
on BI-V100 with ixformer. Documents that bench_bi100.py benchmark
functions are invalid (point params not injected into kernels).
Actual tuning surface is 5 parameters, not dozens:
1. BLOCK_SIZE_M (fused_moe, passes to ixformer)
2. use_v1 threshold (hardcoded True, V2 unimplemented)
3. BLOCK/NUM_WARPS (prefix_prefill Triton JIT)
4. SMEM declaration (affects Triton compiler)
5. autotune config set (triton_flash_attention)
2026-08-03 10:34:28 +00:00
dylanyunlon
dc9ac0a757
feat(muh): apply CCCL-derived BI-V100 tuning to 5 vllm Python files
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Applied via muh/vllm_bi100_patch.py --conservative:
1. paged_attn.py: removed use_v1=True hardcode, restored V1/V2 heuristic
with BI-V100 threshold (16384 vs default 8192). SM=16 favors V1 longer.
2. fused_moe.py: BLOCK_SIZE_K 32→64 (better memory coalescing with 900GB/s
BW), BLOCK_SIZE_N 32→64 for decode path. Qwen3.6 MoE: E≈128, topk=8.
3. _custom_ops.py: SMEM kept at 32KB (conservative mode, pending hardware
confirmation). Added diagnostic comment.
4. prefix_prefill.py: enhanced BI-V100 block config comment with SMEM
budget breakdown (BLOCK=64,N=64 → 48KB tight, N=32 → 32KB safe).
5. triton_flash_attention.py: added 2 BI-V100 autotune configs
(64x32 and 32x64) for SM=16 occupancy characteristics.
CCCL basis: cub/benchmarks/bench/ %RANGE% parameter spaces (reduce 1044
combos, scan 5.4M, topk 1698, transform 25920) → SMEM pruning → policy
selector logic from tuning_*.cuh.
Also includes muh/vllm_bi100_patch.py (713 lines) for reproducible
one-shot patching with --dry-run, --conservative, and --revert modes.
2026-08-03 10:27:10 +00:00
dylanyunlon
ef6abf3dc7
[DEPLOY] Complete submission: baseline + all optimizations
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Adds ALL files needed for Dockerfile build:
- qwen3_6_scripts/ (baseline patches + our optimizations)
- vllm/ (full vllm package)
- paged_attention_v2_pytorch.py (V2 with single-bmm optimization)
- Dockerfile + computility-run.yaml
Our optimizations vs baseline:
1. paged_attn.py: pre-gathered context KV (eliminates 194 gather calls),
Triton try/fallback, V2 heuristic, threshold 32K→64K
2. paged_attention_v2_pytorch.py: fills NotImplementedError,
single-bmm Phase 1 (195 launches → 3)
3. patch_enable_triton.py: HAS_TRITON=True with safety fallback
4. patch_triton_tuning.py: BLOCK=64, NUM_WARPS=4 for BI-V100
5. computility-run.yaml: gpu-memory-utilization 0.9→0.95,
max-num-batched-tokens 8192→16384
This repo can now be submitted to dev.modelhub.org.cn as-is.
2026-07-30 16:06:20 +00:00
