Commit Graph

5 Commits

Author SHA1 Message Date
muh-bot
3426d8185a [muh_dispatch] 修正 head_dim=128→256 + 删除死代码 + 强制 V1
从 CCCL cc_dispatch.cuh (150行) 读入完整的 compute capability 分派架构:
  dispatch_compute_cap → dispatch_to_cc_list → policy_getter<PolicySelector, CC>
  C++20: policy_constant 做相同 policy 的 CC 去重
  C++17: lowest_cc_resolver 找最低 CC with same policy

从 qwen3_5.py 确认 Qwen3.6-35B-A3B 实际参数:
  head_dim = 256 (NOT 128)
  num_heads = 24, num_kv_heads = 4
  GQA ratio = 6

关键修正:
1. head_dim 128→256
   旧: qwen36_config(head_dim=128) → BLOCK_N=64 → SMEM=64×128×2×2=32KB ✓
   实际: head_dim=256 → BLOCK_N=64 → SMEM=64×256×2×2=64KB > 48KB → CRASH
   修正: BLOCK_N=32 → SMEM=32×256×2×2=32KB ≤ 48KB ✓

2. 删除 _read_reduce_config (依赖 gen_patch, 容器内不可用)
3. 删除 reduce_threads/reduce_items (ixformer 有自己的 reduce, 我们控制不了)
4. 强制 V1 (v1_v2_threshold = max_seq_len + 1)
5. Pre-computed configs at import time (mirrors CCCL compile-time instantiation)
2026-08-05 07:12:26 +00:00
Claude
9f93d695a9 feat: deploy CCCL-tuned prefix_prefill + muh_dispatch + fix SM=16 count
muh_dispatch.py:
- Fix missing os/sys imports (was crashing on import)
- Fix SM count 50→16 (confirmed via ixsmi, matches hardware.cuh)
- Fix C++ struct name lookup to match actual tuning_reduce.cuh names:
  bi100_plus_float32_o4, bi100_plus_float64_o4, bi100_plus_accum2_o4
  (was: bi100_float32_plus_o4 — wrong name, would always fall through to default)

Dockerfile:
- Add COPY for prefix_prefill.py and muh_dispatch.py
- Deploy CCCL-tuned prefix_prefill.py into vllm attention ops
  (BLOCK=64, NUM_WARPS=4 for BI-V100 SM=16)
- Deploy muh_dispatch.py into vllm package for type-dispatched kernel configs
- These files were written but never deployed — dead code until now

Impact: prefix_prefill.py deployment means the CCCL-derived block sizes
actually take effect at runtime. Previously the base image's original
prefix_prefill.py (BLOCK=128 for cc>=80, or 64 for cc<80) was used,
which is correct for BI-V100 but our version adds explicit SM=16
documentation and the path for future tuning.
2026-08-03 08:30:16 +00:00
dylanyunlon
52c5ca7ce5 refactor(muh_dispatch): read-once from C++ headers, not write-twice
Replaces hand-written reduce_threads=512, reduce_items=16 with
_read_reduce_config(accum_size) that reads from tuning_reduce.cuh
via gen_patch.extract_bi100_structs().

Architecture change:
  OLD: hand-write values in Python + verify_against_headers() asserts equal
  NEW: _read_reduce_config() reads from C++ header (single source of truth)
       Falls back to compiled-in defaults only when headers not on disk
       (deployed container), with RuntimeWarning.

No hand-written tuning values remain in the normal code path.
verify_against_headers() removed — there is nothing to verify
when there is only one copy of the truth.
2026-08-01 01:30:42 +08:00
dylanyunlon
03f6a59ebf fix(muh_dispatch): add verify_against_headers() to close the loop
Adds verification that hand-written values in muh_dispatch.py
(reduce_threads=512, reduce_items=16, etc.) match the C++ headers
(bi100_float32_plus_o4 in tuning_reduce.cuh).

Previously: muh_dispatch.py had hand-coded values with no link to
the C++ source of truth. gen_patch.py reads from C++ headers,
but muh_dispatch.py was a separate copy that could diverge.

Now: verify_against_headers() calls gen_patch.extract_bi100_structs()
and compares. Self-test prints mismatches if any exist.
2026-08-01 00:32:16 +08:00
dylanyunlon
e69c46d0b7 [muh] add muh_dispatch.py — CCCL-style type-dispatched kernel config for BI-V100
This is the key differentiator vs parameter brute-force.

Everyone else hardcodes BLOCK_SIZE=64, NUM_WARPS=4, PARTITION_SIZE=512.
muh_dispatch replaces these with type-dispatched values derived from
CCCL's policy_selector architecture.

Dispatch axes (matching CCCL type_t × op_kind_t × offset_size):
  - dtype → determines accum_size, SMEM per element
  - head_dim → determines tile width, SMEM constraint
  - max_seq_len → determines V1/V2 threshold (single_tile vs multi_tile)
  - num_kv_heads → determines GQA ratio (memory access pattern)

Output: AttentionConfig struct with all kernel parameters.
CCCL reference: ReducePolicy{multi_tile, single_tile} pattern.

Example type dispatches for Qwen3.6 on BI-V100:
  bf16 h128 100K → partition=512, v1_thresh=8192, reduce(512,16,vec=4)
  bf16 h256 100K → partition=256, v1_thresh=8192, reduce(512,16,vec=4)
  fp32 h128 32K  → partition=256, v1_thresh=8192, reduce(512,16,vec=4)
  bf16 h128 2K   → v1_thresh=2049 (always V1, skip V2 overhead)
2026-07-31 19:11:46 +08:00