claude
302aa9608a
fix: block_copy.cu — DEVICE_INLINE, CHECK_EQ→TORCH_CHECK, cstdint
...
Remaining glog dependencies removed:
- DEVICE_INLINE macro defined inline
- CHECK_EQ(a,b) → TORCH_CHECK(a == b)
- CHECK_GT(a,b) → TORCH_CHECK(a > b)
- #include <cstdint> for int32_t
2026-08-14 11:06:07 +00:00
claude
900ae0b1ef
fix: block_copy.cu remove utils.h (glog), CHECK→TORCH_CHECK
...
3/4 kernels now compile:
✓ xllm_norm.so (rms_norm, fused_add_rms_norm)
✓ xllm_activation.so (silu_and_mul, gelu_and_mul, act_and_mul)
✓ xllm_rope.so (rotary_embedding)
→ xllm_cache.so block_copy.cu had utils.h→glog — fixed
2026-08-14 11:02:57 +00:00
claude
0359103b9b
fix: remove glog/cuda_ops_api.h dependency from all xllm CUDA kernels
...
cuda_ops_api.h includes glog/logging.h and ATen/DynamicLibrary.h
which are not available in corex standalone compilation.
All kernel .cu files only need device_utils.cuh (provides namespace,
XLLM_KERNEL_ATTR macro, CUB includes, type helpers).
Fixed files:
norm.cu, activation.cu, rope.cu, block_copy.cu, reshape_paged_cache.cu
moe/moe_combine.cu, moe/moe_compute_index.cu, moe/moe_fused_topk.cu
2026-08-14 10:30:10 +00:00
claude
8d75652949
feat: import CUDA kernels from xllm/CCCL/FLA upstream repos
...
Sources cloned and tree'd (no --depth):
- jd-opensource/xllm: ILU kernels, CUDA kernels, MoE kernels
- NVIDIA/cccl: CUB tuning/dispatch headers (block-level primitives)
- fla-org/flash-linear-attention: Triton GDN kernels
- NVIDIA/cutlass: grouped GEMM reference (read, not copied)
- Dao-AILab/flash-attention: attention kernel reference (SM80+, read only)
New CUDA kernels (from xllm, SM-agnostic, portable to BI-V100):
ex_engine/xllm_kernels/cuda/activation.cu (188 lines) — silu_and_mul, gelu
ex_engine/xllm_kernels/cuda/norm.cu (600 lines) — rms_norm, fused_add_rms_norm
ex_engine/xllm_kernels/cuda/rope.cu (258 lines) — rotary_embedding
ex_engine/xllm_kernels/cuda/block_copy.cu (209 lines) — copy_blocks, swap_blocks
ex_engine/xllm_kernels/cuda/reshape_paged_cache.cu (101 lines) — KV cache ops
ex_engine/xllm_kernels/cuda/headers/ (5 headers for compilation)
ILU bridge kernel sources (from xllm, verified SAME as upstream):
ex_engine/xllm_kernels/ilu/ (10 files, 925 lines total)
— activation.cpp, attention.cpp, fused_moe.cpp, group_gemm.cpp,
matmul.cpp, norm.cpp, rope.cpp, ilu_ops_api.h, ixformer.h, utils.h
FLA Triton GDN kernels (for GatedDeltaNet without SM90+ FlashQLA):
ex_engine/fla_kernels/gated_delta_rule/ (7 files, 2370 lines)
— chunk_fwd.py (428), chunk.py (487), wy_fast.py (409),
fused_recurrent.py (392), naive.py (161), gate.py (380)
CCCL sync (12 tuning + 14 dispatch headers updated from NVIDIA/cccl):
cccl_upstream/cub/cub/device/dispatch/tuning/ — 12 changed files synced
cccl_upstream/cub/cub/device/dispatch/ — 14 changed dispatch files synced
Compilation targets for real machine (ivcore10):
1. CUDA kernels: --cuda-gpu-arch=ivcore10 via corex clang/16
2. ILU bridges: torch.utils.cpp_extension linking ixformer .so
3. FLA kernels: Triton JIT (if Triton works on BI-V100)
2026-08-14 07:48:52 +00:00
