From ab078989da205f2c67f93fdebb5d93d6f0ea4bd1 Mon Sep 17 00:00:00 2001 From: root Date: Tue, 18 Aug 2026 07:41:38 +0000 Subject: [PATCH] =?UTF-8?q?[fix]=20reshape=5Fpaged=5Fcache=20slot=5Fmappin?= =?UTF-8?q?g=20int64=E2=86=92int32=20(C++=20data=5Fptr=E8=A6=81?= =?UTF-8?q?=E6=B1=82)?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- ex_engine/python/xllm_ops.py | 6 ++++-- qwen3_6_scripts/ex_engine/python/xllm_ops.py | 6 ++++-- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/ex_engine/python/xllm_ops.py b/ex_engine/python/xllm_ops.py index 15217662..1721512a 100644 --- a/ex_engine/python/xllm_ops.py +++ b/ex_engine/python/xllm_ops.py @@ -149,9 +149,11 @@ def gelu_and_mul(input, output=None): # --- Cache (xllm_cache.so) --- # C++ reshape_paged_cache(slot_ids, keys, values, key_cache, value_cache) # — slot_ids FIRST (not last!) +# — slot_ids must be int32 (C++ uses data_ptr), vllm passes int64 def reshape_and_cache(key, value, key_cache, value_cache, slot_mapping): - """Write KV to paged cache. C++ takes slot_ids as FIRST arg.""" - return _get("xllm_cache").reshape_paged_cache(slot_mapping, key, value, + """Write KV to paged cache. C++ takes slot_ids as FIRST arg, dtype=int32.""" + slot_mapping_i32 = slot_mapping.to(torch.int32) + return _get("xllm_cache").reshape_paged_cache(slot_mapping_i32, key, value, key_cache, value_cache) # --- Attention (ix_moe_bridge.so) --- diff --git a/qwen3_6_scripts/ex_engine/python/xllm_ops.py b/qwen3_6_scripts/ex_engine/python/xllm_ops.py index 15217662..1721512a 100644 --- a/qwen3_6_scripts/ex_engine/python/xllm_ops.py +++ b/qwen3_6_scripts/ex_engine/python/xllm_ops.py @@ -149,9 +149,11 @@ def gelu_and_mul(input, output=None): # --- Cache (xllm_cache.so) --- # C++ reshape_paged_cache(slot_ids, keys, values, key_cache, value_cache) # — slot_ids FIRST (not last!) +# — slot_ids must be int32 (C++ uses data_ptr), vllm passes int64 def reshape_and_cache(key, value, key_cache, value_cache, slot_mapping): - """Write KV to paged cache. C++ takes slot_ids as FIRST arg.""" - return _get("xllm_cache").reshape_paged_cache(slot_mapping, key, value, + """Write KV to paged cache. C++ takes slot_ids as FIRST arg, dtype=int32.""" + slot_mapping_i32 = slot_mapping.to(torch.int32) + return _get("xllm_cache").reshape_paged_cache(slot_mapping_i32, key, value, key_cache, value_cache) # --- Attention (ix_moe_bridge.so) ---