[MUH] Bootstrap muh toolchain — extract/parse/gen_yaml/gen_patch + baseline.muh

Pipeline:
  1. extract.py: Parses all 26 CCCL tuning_*.cuh → 26 YAML schemas in muh/schema/
  2. parse.py: .muh file parser with extends-inheritance + schema validation
  3. gen_yaml.py: .muh → computility-run.yaml (verified: matches competition reference)
  4. gen_patch.py: .muh → vllm kernel unified diff patches (6 algorithm mappings)
  5. baseline.muh: Competition reference config, all tuning values pending BI-V100 benchmarks

Schemas extracted:
  26 algorithms, 8-19 params each, SM75/80/90/100 reference tunings
  Priority mapping: reduce→attention, topk→sampling, scan→paged_attention,
  transform→activations, batch_memcpy→KV_cache, for→RoPE

Tested: extract→parse→validate→gen_yaml→gen_patch full pipeline passes

muh/schema/reduce.yaml

@@ -0,0 +1,102 @@
+# muh schema for reduce
+# Auto-extracted from cub/cub/device/dispatch/tuning/tuning_reduce.cuh
+# Generated by muh/extract.py
+
+algorithm: reduce
+source: cub/cub/device/dispatch/tuning/tuning_reduce.cuh
+parameters:
+  threads_per_block:
+    type: int
+    range:
+      - 32
+      - 1024
+    step: 32
+  items_per_thread:
+    type: int
+    range:
+      - 1
+      - 32
+    step: 1
+  vec_size:
+    type: int
+    range:
+      - 1
+      - 8
+    step: 1
+  reduce_algorithm:
+    type: enum
+    values:
+      - BLOCK_REDUCE_RAKING
+      - BLOCK_REDUCE_RAKING_COMMUTATIVE_ONLY
+      - BLOCK_REDUCE_WARP_REDUCTIONS
+  load_modifier:
+    type: enum
+    values:
+      - LOAD_DEFAULT
+      - LOAD_CA
+      - LOAD_CG
+      - LOAD_CS
+      - LOAD_CV
+      - LOAD_LDG
+  items:
+    type: int
+    range:
+      - 1
+      - 1024
+    step: 1
+    note: unknown_range
+  threads:
+    type: int
+    range:
+      - 1
+      - 1024
+    step: 1
+    note: unknown_range
+  items_per_vec_load:
+    type: int
+    range:
+      - 1
+      - 1024
+    step: 1
+    note: unknown_range
+  offset_size:
+    type: int
+    range:
+      - 1
+      - 1024
+    step: 1
+    note: unknown_range
+  accum_size:
+    type: int
+    range:
+      - 1
+      - 1024
+    step: 1
+    note: unknown_range
+reference_tunings:
+  sm100:
+    -
+      items: 15
+      threads: 512
+      items_per_vec_load: 2
+    -
+      items: 15
+      threads: 512
+      items_per_vec_load: 1
+    -
+      items: 16
+      threads: 512
+      items_per_vec_load: 2
+    -
+      items: 16
+      threads: 640
+      items_per_vec_load: 1
+    -
+      threads_per_block: 256
+      items_per_thread: 16
+      items_per_vec_load: 4
+bi_v100:
+  status: pending_benchmark
+  note: Run muh benchmark on Iluvatar BI-V100 to fill these values
+  threads_per_block: TBD
+  items_per_thread: TBD