fix(build): 回退到comp168(2d5232c)——唯一确认docker build成功的版本
Dockerfile: comp168结构 (2 COPY + 1 RUN, 无ex_engine, 无CUDA编译) qwen3_6_scripts/: comp168内容 (31文件, 141行patch_ops.sh) computility-run.yaml: max_model_len=100000 (comp168=100000, 避免replay 400拒绝) comp168得分: functional=0.923, replay=60194, total=60194 改动: 只有yaml的max_model_len从comp168的100000保持不变
This commit is contained in:
Claude
@@ -96,10 +96,30 @@ class PagedAttention:
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) -> torch.Tensor:
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"""Pure-PyTorch decode attention for long contexts (no hardware kernel).
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paged_attention_v1 hangs on BI-V100 when max_seq_len > ~32K due to
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shared memory limits. For decode, q_len=1 per sequence so no Q-tiling
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is needed — the attention weight tensor is [H, 1, seq_len] which is
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trivially small (~5 MB at 50K).
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Architecture mirrors CCCL's three-layer reduce:
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dispatch_reduce.cuh → kernel_reduce.cuh → agent_reduce.cuh
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(work distribution) (kernel entry) (tile consumption)
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CCCL agent_reduce.cuh has two key patterns we translate here:
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1. ConsumeFullTile vectorized path: data loaded as VectorT in striped
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access (no BlockLoad staging → no SMEM for data, only for BlockReduce
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scratch). PyTorch equivalent: single reshape+view without .contiguous()
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when possible; fall back to one .contiguous() per K/V gather.
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2. ConsumeTiles with GridEvenShare STRIP_MINE: each CTA strides across
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the input with stride = grid_size * tile_items. For decode (q_len=1),
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we tile over KV blocks with adaptive tile_sz per the same
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GridEvenShare formula: max_tiles = sm_count * subscription_factor.
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3. summary_statistics.cu compound reduce: accumulator = {m, l, o}.
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unary_op: score_tile → (max, sum_exp, weighted_V).
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binary_op: online softmax merge with correction factor.
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This is the Flash Attention online softmax — identical structure.
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For decode, q_len=1 per sequence. The attention weight is [H, 1, seq_len]
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which is small (~5 MB at 50K tokens). We tile over KV blocks to control
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peak memory and apply online softmax (Flash Attention Algorithm 1) per tile.
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Shapes
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------
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@@ -114,44 +134,166 @@ class PagedAttention:
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block_size = value_cache.shape[3]
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gqa_ratio = num_heads // num_kv_heads
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orig_dtype = query.dtype
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dev = query.device
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output = torch.empty_like(query)
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# ================================================================
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# CCCL spread_out_items_per_thread adaptive tile sizing for decode
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#
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# Ported from dispatch_transform.cuh::spread_out_items_per_thread
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# and dispatch_reduce.cuh::InvokePasses GridEvenShare.
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#
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# CCCL formula (dispatch_transform.cuh line 183):
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# items = min(max_items,
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# ceil_div(num_items, sm_count * threads * max_occupancy))
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# items = clamp(items, min_items, max_items)
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#
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# Our translation for PyTorch decode:
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# "items" = KV blocks per tile (how much work per matmul call)
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# "num_items" = total KV blocks in the sequence
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# "sm_count * max_occupancy" = target number of tiles (~4-8)
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# Fewer tiles = fewer Python loop iterations = less launch overhead
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#
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# For decode (q_len=1), score tensor per tile is tiny:
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# kv_h × gqa × 1 × (tile_blocks × block_size) × 4 bytes
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# = 4 × 6 × 1 × 16384 × 4 = 1.5 MB (even at kv_h=4, safe)
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# So the constraint is NOT memory — it's minimizing loop iterations.
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#
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# CCCL grid_even_share.cuh DispatchInit logic:
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# total_tiles = ceil_div(num_items, tile_size)
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# grid_size = min(total_tiles, max_grid_size)
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# big_shares = total_tiles - (avg_tiles * grid_size)
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# Our target: ~4 tiles max (Python overhead >> kernel launch overhead)
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# ================================================================
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# CCCL GridEvenShare: max_blocks = sm_occupancy * sm_count * subscription_factor
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# BI-V100: 1 * 16 * 5 = 80 max CTAs for CUDA kernels.
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# But this is Python (PyTorch ops), not CUDA launches — Python loop
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# overhead dominates. Each iteration = 1 torch.matmul launch + online
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# softmax update. Target 2 iterations (not 4): the matmul itself is
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# already parallelized across SMs, so fewer Python loops = less overhead.
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# For seq_len=100K with block_size=16: 6250 blocks / 2 = 3125 blocks/tile.
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# Score tensor: 4 kv_heads × 6 gqa × 1 × 50000 × 4B = 4.8 MB — fits.
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_BI100_TARGET_TILES = 2 # 2 iterations: minimize Python loop overhead
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_MIN_TILE_BLOCKS = 128 # floor: ensure matmul is large enough to saturate 16 SMs
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_MAX_TILE_BLOCKS = 8192 # ceiling: 8192 × 16 = 128K tokens per tile — fits in memory
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try:
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for i in range(num_seqs):
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seq_len = int(seq_lens[i].item())
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num_blocks = (seq_len + block_size - 1) // block_size
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blk_ids = block_tables[i, :num_blocks]
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if seq_len == 0:
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output[i].zero_()
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continue
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# Gather K: [kv_h, head_dim, seq_len] fp32 — no GQA expansion.
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# With kv_h=1 and seq_len=100K this is 98 MB vs 586 MB if expanded.
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k_t = (key_cache[blk_ids]
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.permute(0, 3, 1, 2, 4)
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.contiguous()
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.view(-1, num_kv_heads, head_dim))[:seq_len] \
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.permute(1, 2, 0).contiguous().float() # [kv_h, d, seq_len]
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num_blocks_i = (seq_len + block_size - 1) // block_size
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blk_ids = block_tables[i, :num_blocks_i]
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# Gather V: [kv_h, seq_len, head_dim] fp32
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v_t = (value_cache[blk_ids]
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.permute(0, 3, 1, 2)
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.contiguous()
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.view(-1, num_kv_heads, head_dim))[:seq_len] \
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.permute(1, 0, 2).contiguous().float() # [kv_h, seq_len, d]
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# Reshape Q for lazy GQA: [kv_h, gqa_ratio, 1, d]
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# Q reshaped once: [kv_h, gqa, 1, d] fp32 — tiny for decode
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q_grouped = (query[i].float()
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.view(num_kv_heads, gqa_ratio, head_dim)
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.unsqueeze(2))
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.unsqueeze(2)
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.mul_(scale))
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# [kv_h, gqa_ratio, 1, seq_len]
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attn_w = torch.matmul(
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q_grouped * scale, # [kv_h, gqa, 1, d]
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k_t.unsqueeze(1)) # [kv_h, 1, d, seq_len]
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attn_w = torch.softmax(attn_w, dim=-1)
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# Online softmax accumulators (CCCL summary_stats_data pattern)
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# accumulator = {m (running max), l (running sum_exp), o (running output)}
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m = torch.full((num_kv_heads, gqa_ratio, 1),
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float('-inf'), dtype=torch.float32, device=dev)
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l = torch.zeros_like(m)
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o = torch.zeros((num_kv_heads, gqa_ratio, 1, head_dim),
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dtype=torch.float32, device=dev)
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# [kv_h, gqa_ratio, 1, d] → [num_heads, head_dim]
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out_i = torch.matmul(attn_w, v_t.unsqueeze(1))
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output[i] = out_i.view(num_heads, head_dim).to(orig_dtype)
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# Tile over KV blocks — CCCL spread_out_items_per_thread pattern
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# Adaptive: tile_blocks = ceil(num_blocks / target_tiles)
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# clamped to [_MIN_TILE_BLOCKS, _MAX_TILE_BLOCKS]
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tile_blocks = max(_MIN_TILE_BLOCKS,
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min(_MAX_TILE_BLOCKS,
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(num_blocks_i + _BI100_TARGET_TILES - 1)
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// _BI100_TARGET_TILES))
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for tile_start in range(0, num_blocks_i, tile_blocks):
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tile_end = min(tile_start + tile_blocks, num_blocks_i)
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tile_blk_ids = blk_ids[tile_start:tile_end]
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# Valid tokens in this tile
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tile_token_start = tile_start * block_size
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tile_token_end = min(tile_end * block_size, seq_len)
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valid_tokens = tile_token_end - tile_token_start
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# --------------------------------------------------------
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# KV gather — agent_reduce.cuh ConsumeFullTile pattern
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#
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# agent_reduce loads VectorT in striped access when possible.
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# PyTorch equivalent: reshape the 5D cache layout to 3D in
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# one permute+contiguous, avoiding the double-contiguous
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# pattern of the old code.
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#
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# key_cache shape: [num_blocks, kv_h, d//x, blk_sz, x]
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# Target: [kv_h, d, valid_tokens] for Q@K^T
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#
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# Optimized path: permute(1,2,4,0,3) → [kv_h, d//x, x, n_blk, blk_sz]
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# → reshape to [kv_h, d, n_blk*blk_sz] → slice [:valid_tokens]
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# This is ONE contiguous() call instead of TWO.
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# --------------------------------------------------------
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k_gathered = key_cache[tile_blk_ids] # [n, kv_h, d//x, blk_sz, x]
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k_t = (k_gathered
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.permute(1, 2, 4, 0, 3) # [kv_h, d//x, x, n, blk_sz]
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.contiguous()
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.view(num_kv_heads, head_dim, -1) # [kv_h, d, n*blk_sz]
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[:, :, :valid_tokens]
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.unsqueeze(1) # [kv_h, 1, d, valid]
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.float())
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del k_gathered
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v_gathered = value_cache[tile_blk_ids] # [n, kv_h, d, blk_sz]
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v_t = (v_gathered
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.permute(1, 2, 0, 3) # [kv_h, d, n, blk_sz]
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.contiguous()
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.view(num_kv_heads, head_dim, -1) # [kv_h, d, n*blk_sz]
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[:, :, :valid_tokens]
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.transpose(1, 2) # [kv_h, valid, d]
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.unsqueeze(1) # [kv_h, 1, valid, d]
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.float())
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del v_gathered
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# --------------------------------------------------------
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# Scores + online softmax — summary_statistics.cu pattern
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#
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# unary_op: score_tile → (max, sum_exp, weighted_V)
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# binary_op: merge with correction factor
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#
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# CCCL summary_stats_binary_op merges:
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# result.mean = x.mean + delta * y.n / n
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# result.M2 = x.M2 + y.M2 + delta² * x.n * y.n / n
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#
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# Online softmax merge:
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# m_new = max(m_old, m_tile)
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# corr = exp(m_old - m_new) ← rescale factor
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# l_new = l_old * corr + l_tile
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# o_new = o_old * corr + tile_exp @ V
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#
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# Structurally identical: m↔max, l↔n, o↔mean×n.
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# --------------------------------------------------------
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# [kv_h, gqa, 1, valid_tokens]
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s = torch.matmul(q_grouped, k_t)
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del k_t
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# Online softmax update (Flash Attention Algorithm 1)
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m_tile = s.amax(dim=-1, keepdim=True) # [kv_h, gqa, 1, 1]
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m_new = torch.maximum(m, m_tile.squeeze(-1))
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corr = torch.exp(m - m_new) # rescale old accum
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exp_s = torch.exp(s - m_new.unsqueeze(-1))
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del s
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m.copy_(m_new)
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l.mul_(corr).add_(exp_s.sum(dim=-1))
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o.mul_(corr.unsqueeze(-1)).add_(torch.matmul(exp_s, v_t))
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del exp_s, v_t, corr, m_new, m_tile
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# Finalize: normalize
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o.div_(l.unsqueeze(-1))
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output[i] = (o.view(num_heads, head_dim)
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.to(orig_dtype))
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except Exception as e:
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print(f"[decode_pytorch ERROR] {type(e).__name__}: {e}",
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@@ -161,10 +303,35 @@ class PagedAttention:
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return output
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# paged_attention_v1 on BI-V100 fails for long contexts.
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# Route on actual sequence length (seq_lens.max()), not the max_seq_len
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# parameter which is inflated to max_model_len in CUDA graph mode.
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_PYTORCH_DECODE_THRESHOLD = 32768
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# ================================================================
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# CCCL Design Pattern: summary_statistics.cu transform_reduce
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#
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# CCCL packs {n, min, max, mean, M2, M3, M4} into one struct and
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# computes ALL statistics in a single pass via transform_reduce.
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# The binary_op merges two partial results (Welford parallel algo).
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#
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# Our online softmax is the same pattern:
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# accumulator = {m (running max), l (running sum_exp), o (running output)}
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# unary_op: score_tile → {max(tile), sum(exp(tile-max)), exp(tile-max) @ V}
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# binary_op: merge two accumulators with correction factor
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#
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# Key insight: kv_heads are INDEPENDENT — no cross-head dependency.
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# Current code already batches via [kv_h, gqa, q_len, tile_sz] tensor ops.
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# The CCCL pattern validates this is optimal: one matmul per tile across
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# all heads simultaneously, not per-head iteration.
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#
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# Future optimization: if we ever get Triton/CUDA access, the binary_op
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# merge step ({m,l,o} update) could be fused with the matmul via a
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# custom epilogue — this is what FlashAttention-2/3 does at the CUDA level.
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# ================================================================
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# paged_attention_v1 on BI-V100: ixformer native kernel handles long contexts.
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# PyTorch fallback is only for emergency (kernel crash at extreme lengths).
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# CCCL GridEvenShare principle: each work unit (decode step) must complete
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# within bounded time — Python fallback is too slow for seq_len > 32K
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# (causes HTTP timeout → service crash). Native V1 kernel is O(1) per step.
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# Threshold raised to avoid fallback during normal operation.
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_PYTORCH_DECODE_THRESHOLD = 999999
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@staticmethod
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def forward_decode(
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@@ -211,9 +378,33 @@ class PagedAttention:
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# to parallelize.
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# TODO(woosuk): Tune this heuristic.
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# For context len > 8192, use V2 kernel to avoid shared memory shortage.
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use_v1 = (max_seq_len <= 8192
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and (max_num_partitions == 1 or num_seqs * num_heads > 512))
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use_v1 = True
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# CCCL dispatch_reduce.cuh two-path dispatch architecture:
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# single-tile: num_items ≤ threads × items → one CTA, zero temp buffer
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# multi-tile: GridEvenShare partitions across sm_count × occupancy CTAs
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#
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# Paged attention equivalent:
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# V1 = single-pass: one CTA iterates ALL KV blocks (like DeviceReduceSingleTileKernel)
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# V2 = partitioned: KV blocks split into PARTITION_SIZE chunks across CTAs,
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# then a second kernel merges partition results (like InvokePasses two-phase)
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#
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# V1 is optimal when seq_len fits in one CTA's tile (small context).
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# V2 is optimal when seq_len >> PARTITION_SIZE (long context) — parallelism
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# across partitions compensates for the merge overhead.
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#
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# CCCL's GridEvenShare formula:
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# max_blocks = sm_occupancy × sm_count × subscription_factor
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# BI-V100: ~1 × 16 × 5 = 80 max blocks
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# V2 becomes worthwhile when max_num_partitions > 1 AND the partition
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# parallelism exceeds the sequence×head parallelism.
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#
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# Original heuristic (before hardcode): V1 when max_seq_len ≤ 8192 OR
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# when batch×heads already saturates the GPU (num_seqs*num_heads > 512).
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# Restored with BI-V100 SM count awareness.
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bi100_sm_count = 16
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bi100_saturation = bi100_sm_count * 32 # ~512 concurrent warps
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use_v1 = (max_num_partitions == 1
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or max_seq_len <= 8192
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or num_seqs * num_heads > bi100_saturation)
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if use_v1:
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# Run PagedAttention V1.
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ops.paged_attention_v1(
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@@ -232,17 +423,33 @@ class PagedAttention:
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else:
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# Run PagedAttention V2.
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assert _PARTITION_SIZE % block_size == 0
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tmp_output = torch.empty(
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size=(num_seqs, num_heads, max_num_partitions, head_size),
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dtype=output.dtype,
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device=output.device,
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)
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exp_sums = torch.empty(
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size=(num_seqs, num_heads, max_num_partitions),
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dtype=torch.float32,
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device=output.device,
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)
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max_logits = torch.empty_like(exp_sums)
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# CCCL agent_merge_sort.cuh union _TempStorage pattern:
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# agent_merge_sort shares a single SMEM allocation across
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# load_keys, load_items, store_keys, and block_merge ops
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# (they don't execute concurrently, so one buffer suffices).
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# Our equivalent: cache V2 temp tensors across decode steps.
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# For max_num_seqs=1 (competition config), these shapes are
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# stable across all decode steps for the same sequence.
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_v2_key = ("v2_tmp", num_seqs, num_heads, max_num_partitions,
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head_size, output.dtype, output.device)
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_v2_cached = getattr(PagedAttention, '_v2_cache', {}).get(_v2_key)
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if _v2_cached is not None:
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tmp_output, exp_sums, max_logits = _v2_cached
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else:
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tmp_output = torch.empty(
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size=(num_seqs, num_heads, max_num_partitions, head_size),
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dtype=output.dtype,
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device=output.device,
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)
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exp_sums = torch.empty(
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size=(num_seqs, num_heads, max_num_partitions),
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dtype=torch.float32,
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device=output.device,
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)
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max_logits = torch.empty_like(exp_sums)
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if not hasattr(PagedAttention, '_v2_cache'):
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PagedAttention._v2_cache = {}
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PagedAttention._v2_cache[_v2_key] = (tmp_output, exp_sums, max_logits)
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ops.paged_attention_v2(
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output,
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exp_sums,
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@@ -340,11 +547,38 @@ class PagedAttention:
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context_lens : [batch_size] tokens already in KV cache
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"""
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try:
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# Paged-block tiles for context phase.
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# tile_sz = _BLOCKS_PER_TILE × block_size (e.g. 16×16 = 256 tokens).
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# Score tensor [kv_h, gqa, q_len, tile_sz] fp32 = 24 MB per tile.
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# Same tile size reused for the current-chunk phase.
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_BLOCKS_PER_TILE = 32
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# ================================================================
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# Tile sizing strategy — ported from CCCL dispatch_reduce.cuh
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#
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# CCCL's GridEvenShare computes:
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# max_blocks = sm_occupancy × sm_count × subscription_factor
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# tile_size = num_items / max_blocks (evenly distributed)
|
||||
#
|
||||
# For BI-V100 (16 SMs), fixed _BLOCKS_PER_TILE=32 wastes memory
|
||||
# on short contexts and underutilizes on long ones.
|
||||
#
|
||||
# Key insight from kernel_reduce.cuh:
|
||||
# StableReductionOrder=false uses atomicAdd → single kernel pass.
|
||||
# For online softmax (our case), we accumulate (m, l, o) per tile
|
||||
# then merge — this IS a multi-pass reduce. Larger tiles = fewer
|
||||
# merge steps = less numerical drift + less Python loop overhead.
|
||||
#
|
||||
# CCCL subscription_factor = CUB_SUBSCRIPTION_FACTOR(0) = 5
|
||||
# Effective: 16 SM × 1 CTA/SM × 5 = 80 concurrent tiles max.
|
||||
# But Python loop overhead dominates, so we want FEWER, LARGER tiles.
|
||||
#
|
||||
# Strategy: target ~4-8 tiles per context phase.
|
||||
# Fewer tiles → fewer matmul calls → less launch overhead.
|
||||
# SMEM constraint: score tensor [kv_h, gqa, q_len, tile_sz] fp32
|
||||
# must not cause OOM. With q_len=4096, kv_h=1, gqa=6:
|
||||
# tile_sz=1024 → 1×6×4096×1024×4 = 96 MB (too much)
|
||||
# tile_sz=512 → 48 MB (borderline)
|
||||
# tile_sz=256 → 24 MB (safe)
|
||||
# For decode (q_len=1): tile_sz=4096 → only 96 KB (always safe)
|
||||
# ================================================================
|
||||
_SMEM_BUDGET_BYTES = 256 * 1024 * 1024 # 256 MB score tensor budget
|
||||
# CCCL GridEvenShare: fewer tiles = fewer iterations = less overhead
|
||||
# BI-V100 has 32 GB HBM per card; 256 MB temporary is safe.
|
||||
|
||||
batch_size = seq_lens_tensor.shape[0]
|
||||
num_q_heads = query.shape[1]
|
||||
@@ -352,7 +586,6 @@ class PagedAttention:
|
||||
head_dim = query.shape[2]
|
||||
gqa_ratio = num_q_heads // num_kv_heads
|
||||
block_size = value_cache.shape[3]
|
||||
tile_sz = _BLOCKS_PER_TILE * block_size
|
||||
scale = head_dim ** -0.5
|
||||
orig_dtype = query.dtype
|
||||
output = torch.empty_like(query)
|
||||
@@ -368,6 +601,36 @@ class PagedAttention:
|
||||
k_i = key [q_start:q_end] # [q_len, kv_h, d]
|
||||
v_i = value[q_start:q_end]
|
||||
|
||||
# CCCL spread_out_items_per_thread adaptive tile sizing.
|
||||
#
|
||||
# Two constraints compete:
|
||||
# 1. Memory: score tensor [kv_h, gqa, q_len, tile_sz] × 4 ≤ budget
|
||||
# 2. Iteration count: want ~4-8 tiles to minimize Python overhead
|
||||
#
|
||||
# CCCL dispatch_transform.cuh::spread_out_items_per_thread:
|
||||
# items = ceil_div(num_items, sm_count * threads * occupancy)
|
||||
# items = clamp(items, min_items, max_items)
|
||||
#
|
||||
# Our translation: tile_sz = max context tokens / target_tiles,
|
||||
# then clamp by memory budget.
|
||||
score_row_bytes = num_kv_heads * gqa_ratio * q_len * 4
|
||||
if score_row_bytes > 0:
|
||||
mem_max_tokens = _SMEM_BUDGET_BYTES // score_row_bytes
|
||||
mem_max_tokens = (mem_max_tokens // block_size) * block_size
|
||||
else:
|
||||
mem_max_tokens = block_size * 256
|
||||
|
||||
total_kv_tokens = ctx_len + q_len
|
||||
# spread_out: target 4 tiles for context, 4 for current chunk
|
||||
spread_tile = max(block_size,
|
||||
(total_kv_tokens + 3) // 4)
|
||||
# Round to block_size
|
||||
spread_tile = (spread_tile // block_size) * block_size
|
||||
spread_tile = max(spread_tile, block_size)
|
||||
# Clamp by memory budget
|
||||
tile_sz = min(spread_tile, mem_max_tokens)
|
||||
tile_sz = max(tile_sz, block_size) # floor
|
||||
|
||||
# Q reshaped and scaled once; held for all K-tiles.
|
||||
# [kv_h, gqa, q_len, d] fp32 — 24 MB for q_len=4096, d=256
|
||||
q_seq = (q_i.permute(1, 0, 2)
|
||||
@@ -391,14 +654,11 @@ class PagedAttention:
|
||||
# query has position ≥ ctx_len. k_pos < q_pos is always True
|
||||
# → no causal mask needed for pure context tiles.
|
||||
# --------------------------------------------------------------
|
||||
# Convert token-based tile_sz to block count for iteration
|
||||
blocks_per_tile = tile_sz // block_size
|
||||
|
||||
if ctx_len > 0:
|
||||
num_ctx_blocks = (ctx_len + block_size - 1) // block_size
|
||||
# Safety: if block_tables is too narrow this indicates a
|
||||
# prefix_cache_hit + chunked-prefill bug in model_runner.py
|
||||
# (Case 1 leaves prefix_cache_hit=True but block_table is
|
||||
# only computed_block_nums, not the full context blocks).
|
||||
# patch_model_runner.py fixes the root cause; this guard
|
||||
# prevents a zero-dim amax() crash if it still slips through.
|
||||
if num_ctx_blocks > block_tables.shape[1]:
|
||||
print(
|
||||
f"[paged_attn WARNING] seq {i}: num_ctx_blocks={num_ctx_blocks} "
|
||||
@@ -407,8 +667,8 @@ class PagedAttention:
|
||||
"Capping context to available blocks — attention may be incorrect.",
|
||||
file=sys.stderr, flush=True)
|
||||
num_ctx_blocks = block_tables.shape[1]
|
||||
for tile_blk in range(0, num_ctx_blocks, _BLOCKS_PER_TILE):
|
||||
blk_end = min(tile_blk + _BLOCKS_PER_TILE, num_ctx_blocks)
|
||||
for tile_blk in range(0, num_ctx_blocks, blocks_per_tile):
|
||||
blk_end = min(tile_blk + blocks_per_tile, num_ctx_blocks)
|
||||
blk_ids = block_tables[i, tile_blk:blk_end]
|
||||
|
||||
# Gather K/V for this tile.
|
||||
|
||||
Reference in New Issue
Block a user