feat: CCCL CachingDeviceAllocator preload — 完整依赖链 288 files
从 cccl_upstream 递归追踪 cub/util_allocator.cuh 的全部 include 依赖: cub/ 9 files (config, util_*, version, detect_cuda_runtime) cuda/ libcudacxx type_traits, concepts, algorithm, iterator... nv/ target macros, preprocessor 总计 288 个头文件 (1.4MB)，打包到 include/ 目录，编译时 -I include 即可完全脱离 CCCL 原始目录结构。 .cu 文件直接 #include <cub/util_allocator.cuh>， 走原版 CUB CachingDeviceAllocator，零 mock。 BI-V100 参数: growth=2 bins=[8..32] max_cached=8GB/device
This commit is contained in:
dylanyunlon
169
qwen3_6_scripts/cccl_preload/include/nv/detail/__preprocessor
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169
qwen3_6_scripts/cccl_preload/include/nv/detail/__preprocessor
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@@ -0,0 +1,169 @@
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//===----------------------------------------------------------------------===//
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//
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// Part of libcu++, the C++ Standard Library for your entire system,
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// under the Apache License v2.0 with LLVM Exceptions.
|
||||
// See https://llvm.org/LICENSE.txt for license information.
|
||||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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||||
// SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
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//
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//===----------------------------------------------------------------------===//
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|
||||
#if defined(__GNUC__)
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# pragma GCC system_header
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#endif
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// For all compilers and dialects this header defines:
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// _NV_EVAL
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// _NV_IF
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// _NV_CONCAT_EVAL
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// For C++11 and up it defines:
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// _NV_STRIP_PAREN
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// _NV_DISPATCH_N_ARY
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// _NV_FIRST_ARG
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// _NV_REMOVE_PAREN
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||||
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||||
#define _NV_EVAL1(...) __VA_ARGS__
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#define _NV_EVAL(...) _NV_EVAL1(__VA_ARGS__)
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#define _NV_CONCAT_EVAL1(l, r) _NV_EVAL(l##r)
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#define _NV_CONCAT_EVAL(l, r) _NV_CONCAT_EVAL1(l, r)
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#define _NV_IF_0(t, f) f
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#define _NV_IF_1(t, f) t
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#define _NV_IF_BIT(b) _NV_EVAL(_NV_IF_##b)
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#define _NV_IF__EVAL(fn, t, f) _NV_EVAL(fn(t, f))
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#define _NV_IF_EVAL(cond, t, f) _NV_IF__EVAL(_NV_IF_BIT(cond), t, f)
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#define _NV_IF1(cond, t, f) _NV_IF_EVAL(cond, t, f)
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#define _NV_IF(cond, t, f) _NV_IF1(_NV_EVAL(cond), _NV_EVAL(t), _NV_EVAL(f))
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// The below mechanisms were derived from: https://gustedt.wordpress.com/2010/06/08/detect-empty-macro-arguments/
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#define _NV_ARG32(...) _NV_EVAL(_NV_ARG32_0(__VA_ARGS__))
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#define _NV_ARG32_0( \
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_0, \
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_1, \
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_2, \
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_3, \
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_4, \
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_5, \
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_30, \
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_31, \
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...) \
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_31
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#define _NV_HAS_COMMA(...) \
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_NV_ARG32(__VA_ARGS__, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0)
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#define _NV_TRIGGER_PARENTHESIS_(...) ,
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||||
|
||||
/*
|
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This tests a variety of conditions for determining what the incoming statement is.
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1. test if there is just one argument
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2. test if _TRIGGER_PARENTHESIS_ together with the argument adds a comma
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3. test if the argument together with a parenthesis adds a comma
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4. test if placing it between _TRIGGER_PARENTHESIS_ and the parenthesis adds a comma
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*/
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#define _NV_ISEMPTY(...) \
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_NV_ISEMPTY0(_NV_EVAL(_NV_HAS_COMMA(__VA_ARGS__)), \
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_NV_EVAL(_NV_HAS_COMMA(_NV_TRIGGER_PARENTHESIS_ __VA_ARGS__)), \
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_NV_EVAL(_NV_HAS_COMMA(__VA_ARGS__(/*empty*/))), \
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_NV_EVAL(_NV_HAS_COMMA(_NV_TRIGGER_PARENTHESIS_ __VA_ARGS__(/*empty*/))))
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#define _NV_PASTE5(_0, _1, _2, _3, _4) _0##_1##_2##_3##_4
|
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#define _NV_ISEMPTY0(_0, _1, _2, _3) _NV_HAS_COMMA(_NV_PASTE5(_NV_IS_EMPTY_CASE_, _0, _1, _2, _3))
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#define _NV_IS_EMPTY_CASE_0001 ,
|
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|
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#define _NV_REMOVE_PAREN(...) _NV_REMOVE_PAREN1(__VA_ARGS__)
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#define _NV_REMOVE_PAREN1(...) \
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_NV_STRIP_PAREN(_NV_IF(_NV_TEST_PAREN(__VA_ARGS__), (_NV_STRIP_PAREN(__VA_ARGS__)), (__VA_ARGS__)))
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#define _NV_STRIP_PAREN2(...) __VA_ARGS__
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#define _NV_STRIP_PAREN1(...) _NV_STRIP_PAREN2 __VA_ARGS__
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#define _NV_STRIP_PAREN(...) _NV_STRIP_PAREN1(__VA_ARGS__)
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#define _NV_TEST_PAREN(...) _NV_TEST_PAREN1(__VA_ARGS__)
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#define _NV_TEST_PAREN1(...) _NV_TEST_PAREN2(_NV_TEST_PAREN_DUMMY __VA_ARGS__)
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#define _NV_TEST_PAREN2(...) _NV_TEST_PAREN3(_NV_CONCAT_EVAL(_, __VA_ARGS__))
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#define _NV_TEST_PAREN3(...) _NV_EVAL(_NV_FIRST_ARG(__VA_ARGS__))
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#define __NV_PAREN_YES 1
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#define __NV_PAREN_NO 0
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#define _NV_TEST_PAREN_DUMMY(...) _NV_PAREN_YES
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#define __NV_TEST_PAREN_DUMMY __NV_PAREN_NO,
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#define _NV_FIRST_ARG1(x, ...) x
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#define _NV_FIRST_ARG(x, ...) _NV_FIRST_ARG1(x)
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#define _NV_REMOVE_FIRST_ARGS1(...) __VA_ARGS__
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#define _NV_REMOVE_FIRST_ARGS(x, ...) _NV_REMOVE_FIRST_ARGS1(__VA_ARGS__)
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|
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#define _NV_NUM_ARGS(...) _NV_NUM_ARGS0(__VA_ARGS__)
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#define _NV_NUM_ARGS0(...) _NV_EVAL(_NV_NUM_ARGS1(__VA_ARGS__))
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#define _NV_NUM_ARGS1(...) _NV_IF(_NV_ISEMPTY(__VA_ARGS__), 0, _NV_NUM_ARGS2(__VA_ARGS__))
|
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#define _NV_NUM_ARGS2(...) \
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_NV_ARG32( \
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__VA_ARGS__, \
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31, \
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0)
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#define _NV_DISPATCH_N_IMPL1(name, ...) _NV_EVAL(name(__VA_ARGS__))
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#define _NV_DISPATCH_N_IMPL0(depth, name, ...) _NV_DISPATCH_N_IMPL1(_NV_CONCAT_EVAL(name, depth), __VA_ARGS__)
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#define _NV_DISPATCH_N_IMPL(name, ...) _NV_DISPATCH_N_IMPL0(_NV_NUM_ARGS(__VA_ARGS__), name, __VA_ARGS__)
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||||
#define _NV_DISPATCH_N_ARY(name, ...) _NV_DISPATCH_N_IMPL(name, __VA_ARGS__)
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||||
794
qwen3_6_scripts/cccl_preload/include/nv/detail/__target_macros
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794
qwen3_6_scripts/cccl_preload/include/nv/detail/__target_macros
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@@ -0,0 +1,794 @@
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//===----------------------------------------------------------------------===//
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||||
//
|
||||
// Part of libcu++, the C++ Standard Library for your entire system,
|
||||
// under the Apache License v2.0 with LLVM Exceptions.
|
||||
// See https://llvm.org/LICENSE.txt for license information.
|
||||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
||||
// SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
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//
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//===----------------------------------------------------------------------===//
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#ifndef _NV__TARGET_MACROS
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#define _NV__TARGET_MACROS
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#include <nv/detail/__preprocessor>
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#if defined(__GNUC__)
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# pragma GCC system_header
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#endif
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#define _NV_TARGET_ARCH_TO_SELECTOR_350 nv::target::sm_35
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#define _NV_TARGET_ARCH_TO_SELECTOR_370 nv::target::sm_37
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#define _NV_TARGET_ARCH_TO_SELECTOR_500 nv::target::sm_50
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#define _NV_TARGET_ARCH_TO_SELECTOR_520 nv::target::sm_52
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#define _NV_TARGET_ARCH_TO_SELECTOR_530 nv::target::sm_53
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#define _NV_TARGET_ARCH_TO_SELECTOR_600 nv::target::sm_60
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#define _NV_TARGET_ARCH_TO_SELECTOR_610 nv::target::sm_61
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#define _NV_TARGET_ARCH_TO_SELECTOR_620 nv::target::sm_62
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#define _NV_TARGET_ARCH_TO_SELECTOR_700 nv::target::sm_70
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#define _NV_TARGET_ARCH_TO_SELECTOR_720 nv::target::sm_72
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#define _NV_TARGET_ARCH_TO_SELECTOR_750 nv::target::sm_75
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#define _NV_TARGET_ARCH_TO_SELECTOR_800 nv::target::sm_80
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#define _NV_TARGET_ARCH_TO_SELECTOR_860 nv::target::sm_86
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#define _NV_TARGET_ARCH_TO_SELECTOR_870 nv::target::sm_87
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#define _NV_TARGET_ARCH_TO_SELECTOR_880 nv::target::sm_88
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#define _NV_TARGET_ARCH_TO_SELECTOR_890 nv::target::sm_89
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#define _NV_TARGET_ARCH_TO_SELECTOR_900 nv::target::sm_90
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#define _NV_TARGET_ARCH_TO_SELECTOR_1000 nv::target::sm_100
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#define _NV_TARGET_ARCH_TO_SELECTOR_1030 nv::target::sm_103
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#define _NV_TARGET_ARCH_TO_SELECTOR_1070 nv::target::sm_107
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#define _NV_TARGET_ARCH_TO_SELECTOR_1100 nv::target::sm_110
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#define _NV_TARGET_ARCH_TO_SELECTOR_1200 nv::target::sm_120
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#define _NV_TARGET_ARCH_TO_SELECTOR_1210 nv::target::sm_121
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#define _NV_TARGET_ARCH_TO_SM_350 35
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#define _NV_TARGET_ARCH_TO_SM_370 37
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#define _NV_TARGET_ARCH_TO_SM_500 50
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#define _NV_TARGET_ARCH_TO_SM_520 52
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#define _NV_TARGET_ARCH_TO_SM_530 53
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#define _NV_TARGET_ARCH_TO_SM_600 60
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#define _NV_TARGET_ARCH_TO_SM_610 61
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#define _NV_TARGET_ARCH_TO_SM_620 62
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#define _NV_TARGET_ARCH_TO_SM_700 70
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#define _NV_TARGET_ARCH_TO_SM_720 72
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#define _NV_TARGET_ARCH_TO_SM_750 75
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#define _NV_TARGET_ARCH_TO_SM_800 80
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#define _NV_TARGET_ARCH_TO_SM_860 86
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#define _NV_TARGET_ARCH_TO_SM_870 87
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#define _NV_TARGET_ARCH_TO_SM_880 88
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#define _NV_TARGET_ARCH_TO_SM_890 89
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#define _NV_TARGET_ARCH_TO_SM_900 90
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#define _NV_TARGET_ARCH_TO_SM_1000 100
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#define _NV_TARGET_ARCH_TO_SM_1030 103
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#define _NV_TARGET_ARCH_TO_SM_1070 107
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#define _NV_TARGET_ARCH_TO_SM_1100 110
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#define _NV_TARGET_ARCH_TO_SM_1200 120
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#define _NV_TARGET_ARCH_TO_SM_1210 121
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// Only enable when compiling for CUDA/stdpar
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#if defined(_NV_COMPILER_NVCXX) && defined(_NVHPC_CUDA)
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# define _NV_TARGET_VAL_SM_35 nv::target::sm_35
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# define _NV_TARGET_VAL_SM_37 nv::target::sm_37
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# define _NV_TARGET_VAL_SM_50 nv::target::sm_50
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# define _NV_TARGET_VAL_SM_52 nv::target::sm_52
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# define _NV_TARGET_VAL_SM_53 nv::target::sm_53
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# define _NV_TARGET_VAL_SM_60 nv::target::sm_60
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# define _NV_TARGET_VAL_SM_61 nv::target::sm_61
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# define _NV_TARGET_VAL_SM_62 nv::target::sm_62
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# define _NV_TARGET_VAL_SM_70 nv::target::sm_70
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# define _NV_TARGET_VAL_SM_72 nv::target::sm_72
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# define _NV_TARGET_VAL_SM_75 nv::target::sm_75
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# define _NV_TARGET_VAL_SM_80 nv::target::sm_80
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# define _NV_TARGET_VAL_SM_86 nv::target::sm_86
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# define _NV_TARGET_VAL_SM_87 nv::target::sm_87
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# define _NV_TARGET_VAL_SM_88 nv::target::sm_88
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# define _NV_TARGET_VAL_SM_89 nv::target::sm_89
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# define _NV_TARGET_VAL_SM_90 nv::target::sm_90
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# define _NV_TARGET_VAL_SM_100 nv::target::sm_100
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# define _NV_TARGET_VAL_SM_103 nv::target::sm_103
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# define _NV_TARGET_VAL_SM_107 nv::target::sm_107
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# define _NV_TARGET_VAL_SM_110 nv::target::sm_110
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# define _NV_TARGET_VAL_SM_120 nv::target::sm_120
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# define _NV_TARGET_VAL_SM_121 nv::target::sm_121
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# define _NV_TARGET___NV_IS_HOST nv::target::is_host
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# define _NV_TARGET___NV_IS_DEVICE nv::target::is_device
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# define _NV_TARGET___NV_ANY_TARGET (nv::target::any_target)
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# define _NV_TARGET___NV_NO_TARGET (nv::target::no_target)
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# if defined(NV_TARGET_SM_INTEGER_LIST)
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# define NV_TARGET_MINIMUM_SM_SELECTOR _NV_FIRST_ARG(NV_TARGET_SM_SELECTOR_LIST)
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# define NV_TARGET_MINIMUM_SM_INTEGER _NV_FIRST_ARG(NV_TARGET_SM_INTEGER_LIST)
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# define __CUDA_MINIMUM_ARCH__ _NV_CONCAT_EVAL(_NV_FIRST_ARG(NV_TARGET_SM_INTEGER_LIST), 0)
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# endif
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# define _NV_TARGET_PROVIDES(q) nv::target::provides(q)
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# define _NV_TARGET_IS_EXACTLY(q) nv::target::is_exactly(q)
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#elif defined(_NV_COMPILER_NVCC) || defined(_NV_COMPILER_CLANG_CUDA)
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||||
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||||
# define _NV_TARGET_VAL_SM_35 350
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||||
# define _NV_TARGET_VAL_SM_37 370
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||||
# define _NV_TARGET_VAL_SM_50 500
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||||
# define _NV_TARGET_VAL_SM_52 520
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||||
# define _NV_TARGET_VAL_SM_53 530
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||||
# define _NV_TARGET_VAL_SM_60 600
|
||||
# define _NV_TARGET_VAL_SM_61 610
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||||
# define _NV_TARGET_VAL_SM_62 620
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||||
# define _NV_TARGET_VAL_SM_70 700
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||||
# define _NV_TARGET_VAL_SM_72 720
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||||
# define _NV_TARGET_VAL_SM_75 750
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||||
# define _NV_TARGET_VAL_SM_80 800
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||||
# define _NV_TARGET_VAL_SM_86 860
|
||||
# define _NV_TARGET_VAL_SM_87 870
|
||||
# define _NV_TARGET_VAL_SM_88 880
|
||||
# define _NV_TARGET_VAL_SM_89 890
|
||||
# define _NV_TARGET_VAL_SM_90 900
|
||||
# define _NV_TARGET_VAL_SM_100 1000
|
||||
# define _NV_TARGET_VAL_SM_103 1030
|
||||
# define _NV_TARGET_VAL_SM_107 1070
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||||
# define _NV_TARGET_VAL_SM_110 1100
|
||||
# define _NV_TARGET_VAL_SM_120 1200
|
||||
# define _NV_TARGET_VAL_SM_121 1210
|
||||
|
||||
# if defined(__CUDA_ARCH__)
|
||||
# define _NV_TARGET_VAL __CUDA_ARCH__
|
||||
# define NV_TARGET_MINIMUM_SM_SELECTOR _NV_CONCAT_EVAL(_NV_TARGET_ARCH_TO_SELECTOR_, __CUDA_ARCH__)
|
||||
# define NV_TARGET_MINIMUM_SM_INTEGER _NV_CONCAT_EVAL(_NV_TARGET_ARCH_TO_SM_, __CUDA_ARCH__)
|
||||
# define __CUDA_MINIMUM_ARCH__ __CUDA_ARCH__
|
||||
# endif
|
||||
|
||||
# if defined(__CUDA_ARCH__)
|
||||
# define _NV_TARGET_IS_HOST 0
|
||||
# define _NV_TARGET_IS_DEVICE 1
|
||||
# else
|
||||
# define _NV_TARGET_IS_HOST 1
|
||||
# define _NV_TARGET_IS_DEVICE 0
|
||||
# endif
|
||||
|
||||
# if defined(_NV_TARGET_VAL)
|
||||
# define _NV_DEVICE_CHECK(q) (q)
|
||||
# else
|
||||
# define _NV_DEVICE_CHECK(q) (0)
|
||||
# endif
|
||||
|
||||
# define _NV_TARGET_PROVIDES(q) _NV_DEVICE_CHECK(_NV_TARGET_VAL >= q)
|
||||
# define _NV_TARGET_IS_EXACTLY(q) _NV_DEVICE_CHECK(_NV_TARGET_VAL == q)
|
||||
|
||||
// NVCC/NVCXX not being used, only host dispatches allowed
|
||||
#else
|
||||
|
||||
# define _NV_COMPILER_NVCC
|
||||
|
||||
# define _NV_TARGET_VAL_SM_35 350
|
||||
# define _NV_TARGET_VAL_SM_37 370
|
||||
# define _NV_TARGET_VAL_SM_50 500
|
||||
# define _NV_TARGET_VAL_SM_52 520
|
||||
# define _NV_TARGET_VAL_SM_53 530
|
||||
# define _NV_TARGET_VAL_SM_60 600
|
||||
# define _NV_TARGET_VAL_SM_61 610
|
||||
# define _NV_TARGET_VAL_SM_62 620
|
||||
# define _NV_TARGET_VAL_SM_70 700
|
||||
# define _NV_TARGET_VAL_SM_72 720
|
||||
# define _NV_TARGET_VAL_SM_75 750
|
||||
# define _NV_TARGET_VAL_SM_80 800
|
||||
# define _NV_TARGET_VAL_SM_86 860
|
||||
# define _NV_TARGET_VAL_SM_87 870
|
||||
# define _NV_TARGET_VAL_SM_88 880
|
||||
# define _NV_TARGET_VAL_SM_89 890
|
||||
# define _NV_TARGET_VAL_SM_90 900
|
||||
# define _NV_TARGET_VAL_SM_100 1000
|
||||
# define _NV_TARGET_VAL_SM_103 1030
|
||||
# define _NV_TARGET_VAL_SM_107 1070
|
||||
# define _NV_TARGET_VAL_SM_110 1100
|
||||
# define _NV_TARGET_VAL_SM_120 1200
|
||||
# define _NV_TARGET_VAL_SM_121 1210
|
||||
|
||||
# define _NV_TARGET_VAL 0
|
||||
|
||||
# define _NV_TARGET_IS_HOST 1
|
||||
# define _NV_TARGET_IS_DEVICE 0
|
||||
|
||||
# define _NV_DEVICE_CHECK(q) (false)
|
||||
|
||||
# define _NV_TARGET_PROVIDES(q) _NV_DEVICE_CHECK(_NV_TARGET_VAL >= q)
|
||||
# define _NV_TARGET_IS_EXACTLY(q) _NV_DEVICE_CHECK(_NV_TARGET_VAL == q)
|
||||
|
||||
#endif
|
||||
|
||||
#define _NV_TARGET___NV_PROVIDES_SM_35 (_NV_TARGET_PROVIDES(_NV_TARGET_VAL_SM_35))
|
||||
#define _NV_TARGET___NV_PROVIDES_SM_37 (_NV_TARGET_PROVIDES(_NV_TARGET_VAL_SM_37))
|
||||
#define _NV_TARGET___NV_PROVIDES_SM_50 (_NV_TARGET_PROVIDES(_NV_TARGET_VAL_SM_50))
|
||||
#define _NV_TARGET___NV_PROVIDES_SM_52 (_NV_TARGET_PROVIDES(_NV_TARGET_VAL_SM_52))
|
||||
#define _NV_TARGET___NV_PROVIDES_SM_53 (_NV_TARGET_PROVIDES(_NV_TARGET_VAL_SM_53))
|
||||
#define _NV_TARGET___NV_PROVIDES_SM_60 (_NV_TARGET_PROVIDES(_NV_TARGET_VAL_SM_60))
|
||||
#define _NV_TARGET___NV_PROVIDES_SM_61 (_NV_TARGET_PROVIDES(_NV_TARGET_VAL_SM_61))
|
||||
#define _NV_TARGET___NV_PROVIDES_SM_62 (_NV_TARGET_PROVIDES(_NV_TARGET_VAL_SM_62))
|
||||
#define _NV_TARGET___NV_PROVIDES_SM_70 (_NV_TARGET_PROVIDES(_NV_TARGET_VAL_SM_70))
|
||||
#define _NV_TARGET___NV_PROVIDES_SM_72 (_NV_TARGET_PROVIDES(_NV_TARGET_VAL_SM_72))
|
||||
#define _NV_TARGET___NV_PROVIDES_SM_75 (_NV_TARGET_PROVIDES(_NV_TARGET_VAL_SM_75))
|
||||
#define _NV_TARGET___NV_PROVIDES_SM_80 (_NV_TARGET_PROVIDES(_NV_TARGET_VAL_SM_80))
|
||||
#define _NV_TARGET___NV_PROVIDES_SM_86 (_NV_TARGET_PROVIDES(_NV_TARGET_VAL_SM_86))
|
||||
#define _NV_TARGET___NV_PROVIDES_SM_87 (_NV_TARGET_PROVIDES(_NV_TARGET_VAL_SM_87))
|
||||
#define _NV_TARGET___NV_PROVIDES_SM_88 (_NV_TARGET_PROVIDES(_NV_TARGET_VAL_SM_88))
|
||||
#define _NV_TARGET___NV_PROVIDES_SM_89 (_NV_TARGET_PROVIDES(_NV_TARGET_VAL_SM_89))
|
||||
#define _NV_TARGET___NV_PROVIDES_SM_90 (_NV_TARGET_PROVIDES(_NV_TARGET_VAL_SM_90))
|
||||
#define _NV_TARGET___NV_PROVIDES_SM_100 (_NV_TARGET_PROVIDES(_NV_TARGET_VAL_SM_100))
|
||||
#define _NV_TARGET___NV_PROVIDES_SM_103 (_NV_TARGET_PROVIDES(_NV_TARGET_VAL_SM_103))
|
||||
#define _NV_TARGET___NV_PROVIDES_SM_107 (_NV_TARGET_PROVIDES(_NV_TARGET_VAL_SM_107))
|
||||
#define _NV_TARGET___NV_PROVIDES_SM_110 (_NV_TARGET_PROVIDES(_NV_TARGET_VAL_SM_110))
|
||||
#define _NV_TARGET___NV_PROVIDES_SM_120 (_NV_TARGET_PROVIDES(_NV_TARGET_VAL_SM_120))
|
||||
#define _NV_TARGET___NV_PROVIDES_SM_121 (_NV_TARGET_PROVIDES(_NV_TARGET_VAL_SM_121))
|
||||
|
||||
#define _NV_TARGET___NV_IS_EXACTLY_SM_35 (_NV_TARGET_IS_EXACTLY(_NV_TARGET_VAL_SM_35))
|
||||
#define _NV_TARGET___NV_IS_EXACTLY_SM_37 (_NV_TARGET_IS_EXACTLY(_NV_TARGET_VAL_SM_37))
|
||||
#define _NV_TARGET___NV_IS_EXACTLY_SM_50 (_NV_TARGET_IS_EXACTLY(_NV_TARGET_VAL_SM_50))
|
||||
#define _NV_TARGET___NV_IS_EXACTLY_SM_52 (_NV_TARGET_IS_EXACTLY(_NV_TARGET_VAL_SM_52))
|
||||
#define _NV_TARGET___NV_IS_EXACTLY_SM_53 (_NV_TARGET_IS_EXACTLY(_NV_TARGET_VAL_SM_53))
|
||||
#define _NV_TARGET___NV_IS_EXACTLY_SM_60 (_NV_TARGET_IS_EXACTLY(_NV_TARGET_VAL_SM_60))
|
||||
#define _NV_TARGET___NV_IS_EXACTLY_SM_61 (_NV_TARGET_IS_EXACTLY(_NV_TARGET_VAL_SM_61))
|
||||
#define _NV_TARGET___NV_IS_EXACTLY_SM_62 (_NV_TARGET_IS_EXACTLY(_NV_TARGET_VAL_SM_62))
|
||||
#define _NV_TARGET___NV_IS_EXACTLY_SM_70 (_NV_TARGET_IS_EXACTLY(_NV_TARGET_VAL_SM_70))
|
||||
#define _NV_TARGET___NV_IS_EXACTLY_SM_72 (_NV_TARGET_IS_EXACTLY(_NV_TARGET_VAL_SM_72))
|
||||
#define _NV_TARGET___NV_IS_EXACTLY_SM_75 (_NV_TARGET_IS_EXACTLY(_NV_TARGET_VAL_SM_75))
|
||||
#define _NV_TARGET___NV_IS_EXACTLY_SM_80 (_NV_TARGET_IS_EXACTLY(_NV_TARGET_VAL_SM_80))
|
||||
#define _NV_TARGET___NV_IS_EXACTLY_SM_86 (_NV_TARGET_IS_EXACTLY(_NV_TARGET_VAL_SM_86))
|
||||
#define _NV_TARGET___NV_IS_EXACTLY_SM_87 (_NV_TARGET_IS_EXACTLY(_NV_TARGET_VAL_SM_87))
|
||||
#define _NV_TARGET___NV_IS_EXACTLY_SM_88 (_NV_TARGET_IS_EXACTLY(_NV_TARGET_VAL_SM_88))
|
||||
#define _NV_TARGET___NV_IS_EXACTLY_SM_89 (_NV_TARGET_IS_EXACTLY(_NV_TARGET_VAL_SM_89))
|
||||
#define _NV_TARGET___NV_IS_EXACTLY_SM_90 (_NV_TARGET_IS_EXACTLY(_NV_TARGET_VAL_SM_90))
|
||||
#define _NV_TARGET___NV_IS_EXACTLY_SM_100 (_NV_TARGET_IS_EXACTLY(_NV_TARGET_VAL_SM_100))
|
||||
#define _NV_TARGET___NV_IS_EXACTLY_SM_103 (_NV_TARGET_IS_EXACTLY(_NV_TARGET_VAL_SM_103))
|
||||
#define _NV_TARGET___NV_IS_EXACTLY_SM_107 (_NV_TARGET_IS_EXACTLY(_NV_TARGET_VAL_SM_107))
|
||||
#define _NV_TARGET___NV_IS_EXACTLY_SM_110 (_NV_TARGET_IS_EXACTLY(_NV_TARGET_VAL_SM_110))
|
||||
#define _NV_TARGET___NV_IS_EXACTLY_SM_120 (_NV_TARGET_IS_EXACTLY(_NV_TARGET_VAL_SM_120))
|
||||
#define _NV_TARGET___NV_IS_EXACTLY_SM_121 (_NV_TARGET_IS_EXACTLY(_NV_TARGET_VAL_SM_121))
|
||||
|
||||
#define NV_PROVIDES_SM_35 __NV_PROVIDES_SM_35
|
||||
#define NV_PROVIDES_SM_37 __NV_PROVIDES_SM_37
|
||||
#define NV_PROVIDES_SM_50 __NV_PROVIDES_SM_50
|
||||
#define NV_PROVIDES_SM_52 __NV_PROVIDES_SM_52
|
||||
#define NV_PROVIDES_SM_53 __NV_PROVIDES_SM_53
|
||||
#define NV_PROVIDES_SM_60 __NV_PROVIDES_SM_60
|
||||
#define NV_PROVIDES_SM_61 __NV_PROVIDES_SM_61
|
||||
#define NV_PROVIDES_SM_62 __NV_PROVIDES_SM_62
|
||||
#define NV_PROVIDES_SM_70 __NV_PROVIDES_SM_70
|
||||
#define NV_PROVIDES_SM_72 __NV_PROVIDES_SM_72
|
||||
#define NV_PROVIDES_SM_75 __NV_PROVIDES_SM_75
|
||||
#define NV_PROVIDES_SM_80 __NV_PROVIDES_SM_80
|
||||
#define NV_PROVIDES_SM_86 __NV_PROVIDES_SM_86
|
||||
#define NV_PROVIDES_SM_87 __NV_PROVIDES_SM_87
|
||||
#define NV_PROVIDES_SM_88 __NV_PROVIDES_SM_88
|
||||
#define NV_PROVIDES_SM_89 __NV_PROVIDES_SM_89
|
||||
#define NV_PROVIDES_SM_90 __NV_PROVIDES_SM_90
|
||||
#define NV_PROVIDES_SM_100 __NV_PROVIDES_SM_100
|
||||
#define NV_PROVIDES_SM_103 __NV_PROVIDES_SM_103
|
||||
#define NV_PROVIDES_SM_107 __NV_PROVIDES_SM_107
|
||||
#define NV_PROVIDES_SM_110 __NV_PROVIDES_SM_110
|
||||
#define NV_PROVIDES_SM_120 __NV_PROVIDES_SM_120
|
||||
#define NV_PROVIDES_SM_121 __NV_PROVIDES_SM_121
|
||||
|
||||
#define NV_IS_EXACTLY_SM_35 __NV_IS_EXACTLY_SM_35
|
||||
#define NV_IS_EXACTLY_SM_37 __NV_IS_EXACTLY_SM_37
|
||||
#define NV_IS_EXACTLY_SM_50 __NV_IS_EXACTLY_SM_50
|
||||
#define NV_IS_EXACTLY_SM_52 __NV_IS_EXACTLY_SM_52
|
||||
#define NV_IS_EXACTLY_SM_53 __NV_IS_EXACTLY_SM_53
|
||||
#define NV_IS_EXACTLY_SM_60 __NV_IS_EXACTLY_SM_60
|
||||
#define NV_IS_EXACTLY_SM_61 __NV_IS_EXACTLY_SM_61
|
||||
#define NV_IS_EXACTLY_SM_62 __NV_IS_EXACTLY_SM_62
|
||||
#define NV_IS_EXACTLY_SM_70 __NV_IS_EXACTLY_SM_70
|
||||
#define NV_IS_EXACTLY_SM_72 __NV_IS_EXACTLY_SM_72
|
||||
#define NV_IS_EXACTLY_SM_75 __NV_IS_EXACTLY_SM_75
|
||||
#define NV_IS_EXACTLY_SM_80 __NV_IS_EXACTLY_SM_80
|
||||
#define NV_IS_EXACTLY_SM_86 __NV_IS_EXACTLY_SM_86
|
||||
#define NV_IS_EXACTLY_SM_87 __NV_IS_EXACTLY_SM_87
|
||||
#define NV_IS_EXACTLY_SM_88 __NV_IS_EXACTLY_SM_88
|
||||
#define NV_IS_EXACTLY_SM_89 __NV_IS_EXACTLY_SM_89
|
||||
#define NV_IS_EXACTLY_SM_90 __NV_IS_EXACTLY_SM_90
|
||||
#define NV_IS_EXACTLY_SM_100 __NV_IS_EXACTLY_SM_100
|
||||
#define NV_IS_EXACTLY_SM_103 __NV_IS_EXACTLY_SM_103
|
||||
#define NV_IS_EXACTLY_SM_107 __NV_IS_EXACTLY_SM_107
|
||||
#define NV_IS_EXACTLY_SM_110 __NV_IS_EXACTLY_SM_110
|
||||
#define NV_IS_EXACTLY_SM_120 __NV_IS_EXACTLY_SM_120
|
||||
#define NV_IS_EXACTLY_SM_121 __NV_IS_EXACTLY_SM_121
|
||||
|
||||
// Disable SM_90a support on non-supporting compilers.
|
||||
// Will re-enable for nvcc below.
|
||||
#define NV_HAS_FEATURE_SM_90a NV_NO_TARGET
|
||||
#define NV_HAS_FEATURE_SM_100a NV_NO_TARGET
|
||||
#define NV_HAS_FEATURE_SM_103a NV_NO_TARGET
|
||||
#define NV_HAS_FEATURE_SM_107a NV_NO_TARGET
|
||||
#define NV_HAS_FEATURE_SM_110a NV_NO_TARGET
|
||||
#define NV_HAS_FEATURE_SM_120a NV_NO_TARGET
|
||||
#define NV_HAS_FEATURE_SM_121a NV_NO_TARGET
|
||||
|
||||
#define NV_HAS_FEATURE_SM_100f NV_NO_TARGET
|
||||
#define NV_HAS_FEATURE_SM_103f NV_NO_TARGET
|
||||
#define NV_HAS_FEATURE_SM_107f NV_NO_TARGET
|
||||
#define NV_HAS_FEATURE_SM_110f NV_NO_TARGET
|
||||
#define NV_HAS_FEATURE_SM_120f NV_NO_TARGET
|
||||
#define NV_HAS_FEATURE_SM_121f NV_NO_TARGET
|
||||
|
||||
#define NV_IS_HOST __NV_IS_HOST
|
||||
#define NV_IS_DEVICE __NV_IS_DEVICE
|
||||
|
||||
#define NV_ANY_TARGET __NV_ANY_TARGET
|
||||
#define NV_NO_TARGET __NV_NO_TARGET
|
||||
|
||||
// Platform invoke mechanisms
|
||||
#if defined(_NV_COMPILER_NVCXX) && defined(_NVHPC_CUDA)
|
||||
|
||||
# define _NV_ARCH_COND(q) (_NV_TARGET_##q)
|
||||
|
||||
# define _NV_BLOCK_EXPAND(...) _NV_REMOVE_PAREN(__VA_ARGS__)
|
||||
|
||||
# define _NV_TARGET_IF(cond, t, ...) \
|
||||
(if target _NV_ARCH_COND(cond) { _NV_BLOCK_EXPAND(t) } else {_NV_BLOCK_EXPAND(__VA_ARGS__)})
|
||||
|
||||
#elif defined(_NV_COMPILER_NVCC) || defined(_NV_COMPILER_CLANG_CUDA)
|
||||
|
||||
# if (_NV_TARGET___NV_IS_EXACTLY_SM_35)
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_35 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_35 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_IS_EXACTLY_SM_37)
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_37 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_37 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_IS_EXACTLY_SM_50)
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_50 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_50 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_IS_EXACTLY_SM_52)
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_52 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_52 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_IS_EXACTLY_SM_53)
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_53 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_53 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_IS_EXACTLY_SM_60)
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_60 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_60 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_IS_EXACTLY_SM_61)
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_61 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_61 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_IS_EXACTLY_SM_62)
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_62 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_62 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_IS_EXACTLY_SM_70)
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_70 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_70 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_IS_EXACTLY_SM_72)
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_72 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_72 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_IS_EXACTLY_SM_75)
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_75 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_75 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_IS_EXACTLY_SM_80)
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_80 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_80 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_IS_EXACTLY_SM_86)
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_86 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_86 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_IS_EXACTLY_SM_87)
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_87 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_87 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_IS_EXACTLY_SM_88)
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_88 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_88 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_IS_EXACTLY_SM_89)
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_89 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_89 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_IS_EXACTLY_SM_90)
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_90 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_90 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_IS_EXACTLY_SM_100)
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_100 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_100 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_IS_EXACTLY_SM_103)
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_103 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_103 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_IS_EXACTLY_SM_107)
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_107 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_107 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_IS_EXACTLY_SM_110)
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_110 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_110 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_IS_EXACTLY_SM_120)
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_120 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_120 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_IS_EXACTLY_SM_121)
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_121 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_EXACTLY_SM_121 0
|
||||
# endif
|
||||
|
||||
//----------------------------------------------------------------------------------------------------------------------
|
||||
// architecture-specific SM versions
|
||||
|
||||
# if defined(__CUDA_ARCH_SPECIFIC__)
|
||||
# define _NV_TARGET_CHECK_ARCH_SPECIFIC(_MAJOR, _MINOR) (__CUDA_ARCH_SPECIFIC__ == (_MAJOR * 100 + _MINOR * 10))
|
||||
# else
|
||||
# define _NV_TARGET_CHECK_ARCH_SPECIFIC(_MAJOR, _MINOR) (0)
|
||||
# endif
|
||||
|
||||
// Re-enable sm_90a support in nvcc.
|
||||
# undef NV_HAS_FEATURE_SM_90a
|
||||
# define NV_HAS_FEATURE_SM_90a __NV_HAS_FEATURE_SM_90a
|
||||
# if defined(__CUDA_ARCH_FEAT_SM90_ALL) || _NV_TARGET_CHECK_ARCH_SPECIFIC(9, 0)
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_90a 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_90a 0
|
||||
# endif
|
||||
|
||||
// Re-enable sm_100a support in nvcc.
|
||||
# undef NV_HAS_FEATURE_SM_100a
|
||||
# define NV_HAS_FEATURE_SM_100a __NV_HAS_FEATURE_SM_100a
|
||||
# if defined(__CUDA_ARCH_FEAT_SM100_ALL) || _NV_TARGET_CHECK_ARCH_SPECIFIC(10, 0)
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_100a 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_100a 0
|
||||
# endif
|
||||
|
||||
// Re-enable sm_103a support in nvcc.
|
||||
# undef NV_HAS_FEATURE_SM_103a
|
||||
# define NV_HAS_FEATURE_SM_103a __NV_HAS_FEATURE_SM_103a
|
||||
# if defined(__CUDA_ARCH_FEAT_SM103_ALL) || _NV_TARGET_CHECK_ARCH_SPECIFIC(10, 3)
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_103a 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_103a 0
|
||||
# endif
|
||||
|
||||
// Re-enable sm_107a support in nvcc.
|
||||
# undef NV_HAS_FEATURE_SM_107a
|
||||
# define NV_HAS_FEATURE_SM_107a __NV_HAS_FEATURE_SM_107a
|
||||
# if defined(__CUDA_ARCH_FEAT_SM103_ALL) || _NV_TARGET_CHECK_ARCH_SPECIFIC(10, 7)
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_107a 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_107a 0
|
||||
# endif
|
||||
|
||||
// Re-enable sm_110a support in nvcc.
|
||||
# undef NV_HAS_FEATURE_SM_110a
|
||||
# define NV_HAS_FEATURE_SM_110a __NV_HAS_FEATURE_SM_110a
|
||||
# if defined(__CUDA_ARCH_FEAT_SM110_ALL) || _NV_TARGET_CHECK_ARCH_SPECIFIC(11, 0)
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_110a 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_110a 0
|
||||
# endif
|
||||
|
||||
// Re-enable sm_120a support in nvcc.
|
||||
# undef NV_HAS_FEATURE_SM_120a
|
||||
# define NV_HAS_FEATURE_SM_120a __NV_HAS_FEATURE_SM_120a
|
||||
# if defined(__CUDA_ARCH_FEAT_SM120_ALL) || _NV_TARGET_CHECK_ARCH_SPECIFIC(12, 0)
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_120a 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_120a 0
|
||||
# endif
|
||||
|
||||
// Re-enable sm_121a support in nvcc.
|
||||
# undef NV_HAS_FEATURE_SM_121a
|
||||
# define NV_HAS_FEATURE_SM_121a __NV_HAS_FEATURE_SM_121a
|
||||
# if defined(__CUDA_ARCH_FEAT_SM121_ALL) || _NV_TARGET_CHECK_ARCH_SPECIFIC(12, 1)
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_121a 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_121a 0
|
||||
# endif
|
||||
|
||||
//----------------------------------------------------------------------------------------------------------------------
|
||||
// family-specific SM versions
|
||||
|
||||
# if defined(__CUDA_ARCH_FAMILY_SPECIFIC__)
|
||||
# define _NV_TARGET_CHECK_FAMILY_SPECIFIC(_MAJOR, _MINOR) \
|
||||
(__CUDA_ARCH_FAMILY_SPECIFIC__ >= (_MAJOR * 100 + _MINOR * 10) \
|
||||
&& __CUDA_ARCH_FAMILY_SPECIFIC__ < (_MAJOR + 1) * 100)
|
||||
# else
|
||||
# define _NV_TARGET_CHECK_FAMILY_SPECIFIC(_MAJOR, _MINOR) (0)
|
||||
# endif
|
||||
|
||||
// Re-enable sm_100f support in nvcc.
|
||||
# undef NV_HAS_FEATURE_SM_100f
|
||||
# define NV_HAS_FEATURE_SM_100f __NV_HAS_FEATURE_SM_100f
|
||||
# if _NV_TARGET_CHECK_FAMILY_SPECIFIC(10, 0)
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_100f 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_100f 0
|
||||
# endif
|
||||
|
||||
// Re-enable sm_103f support in nvcc.
|
||||
# undef NV_HAS_FEATURE_SM_103f
|
||||
# define NV_HAS_FEATURE_SM_103f __NV_HAS_FEATURE_SM_103f
|
||||
# if _NV_TARGET_CHECK_FAMILY_SPECIFIC(10, 3)
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_103f 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_103f 0
|
||||
# endif
|
||||
|
||||
// Re-enable sm_107f support in nvcc.
|
||||
# undef NV_HAS_FEATURE_SM_107f
|
||||
# define NV_HAS_FEATURE_SM_107f __NV_HAS_FEATURE_SM_107f
|
||||
# if _NV_TARGET_CHECK_FAMILY_SPECIFIC(10, 7)
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_107f 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_107f 0
|
||||
# endif
|
||||
|
||||
// Re-enable sm_110f support in nvcc.
|
||||
# undef NV_HAS_FEATURE_SM_110f
|
||||
# define NV_HAS_FEATURE_SM_110f __NV_HAS_FEATURE_SM_110f
|
||||
# if _NV_TARGET_CHECK_FAMILY_SPECIFIC(11, 0)
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_110f 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_110f 0
|
||||
# endif
|
||||
|
||||
// Re-enable sm_120f support in nvcc.
|
||||
# undef NV_HAS_FEATURE_SM_120f
|
||||
# define NV_HAS_FEATURE_SM_120f __NV_HAS_FEATURE_SM_120f
|
||||
# if _NV_TARGET_CHECK_FAMILY_SPECIFIC(12, 0)
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_120f 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_120f 0
|
||||
# endif
|
||||
|
||||
// Re-enable sm_121f support in nvcc.
|
||||
# undef NV_HAS_FEATURE_SM_121f
|
||||
# define NV_HAS_FEATURE_SM_121f __NV_HAS_FEATURE_SM_121f
|
||||
# if _NV_TARGET_CHECK_FAMILY_SPECIFIC(12, 1)
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_121f 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_HAS_FEATURE_SM_121f 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET_IS_HOST)
|
||||
# define _NV_TARGET_BOOL___NV_IS_HOST 1
|
||||
# define _NV_TARGET_BOOL___NV_IS_DEVICE 0
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_IS_HOST 0
|
||||
# define _NV_TARGET_BOOL___NV_IS_DEVICE 1
|
||||
# endif
|
||||
|
||||
# define _NV_TARGET_BOOL___NV_ANY_TARGET 1
|
||||
# define _NV_TARGET_BOOL___NV_NO_TARGET 0
|
||||
|
||||
// NVCC Greater than stuff
|
||||
|
||||
# if (_NV_TARGET___NV_PROVIDES_SM_35)
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_35 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_35 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_PROVIDES_SM_37)
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_37 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_37 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_PROVIDES_SM_50)
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_50 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_50 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_PROVIDES_SM_52)
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_52 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_52 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_PROVIDES_SM_53)
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_53 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_53 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_PROVIDES_SM_60)
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_60 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_60 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_PROVIDES_SM_61)
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_61 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_61 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_PROVIDES_SM_62)
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_62 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_62 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_PROVIDES_SM_70)
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_70 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_70 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_PROVIDES_SM_72)
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_72 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_72 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_PROVIDES_SM_75)
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_75 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_75 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_PROVIDES_SM_80)
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_80 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_80 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_PROVIDES_SM_86)
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_86 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_86 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_PROVIDES_SM_87)
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_87 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_87 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_PROVIDES_SM_88)
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_88 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_88 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_PROVIDES_SM_89)
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_89 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_89 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_PROVIDES_SM_90)
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_90 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_90 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_PROVIDES_SM_100)
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_100 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_100 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_PROVIDES_SM_103)
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_103 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_103 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_PROVIDES_SM_107)
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_107 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_107 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_PROVIDES_SM_110)
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_110 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_110 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_PROVIDES_SM_120)
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_120 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_120 0
|
||||
# endif
|
||||
|
||||
# if (_NV_TARGET___NV_PROVIDES_SM_121)
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_121 1
|
||||
# else
|
||||
# define _NV_TARGET_BOOL___NV_PROVIDES_SM_121 0
|
||||
# endif
|
||||
|
||||
# define _NV_ARCH_COND_CAT1(cond) _NV_TARGET_BOOL_##cond
|
||||
# define _NV_ARCH_COND_CAT(cond) _NV_EVAL(_NV_ARCH_COND_CAT1(cond))
|
||||
|
||||
# define _NV_TARGET_EMPTY_PARAM ;
|
||||
|
||||
# define _NV_BLOCK_EXPAND(...) {_NV_REMOVE_PAREN(__VA_ARGS__)}
|
||||
# define _NV_TARGET_IF(cond, t, ...) _NV_IF(_NV_ARCH_COND_CAT(cond), t, __VA_ARGS__)
|
||||
|
||||
#endif // _NV_COMPILER_NVCC
|
||||
|
||||
#define _NV_TARGET_DISPATCH_HANDLE0()
|
||||
#define _NV_TARGET_DISPATCH_HANDLE2(q, fn) _NV_TARGET_IF(q, fn)
|
||||
#define _NV_TARGET_DISPATCH_HANDLE4(q, fn, ...) _NV_TARGET_IF(q, fn, _NV_TARGET_DISPATCH_HANDLE2(__VA_ARGS__))
|
||||
#define _NV_TARGET_DISPATCH_HANDLE6(q, fn, ...) _NV_TARGET_IF(q, fn, _NV_TARGET_DISPATCH_HANDLE4(__VA_ARGS__))
|
||||
#define _NV_TARGET_DISPATCH_HANDLE8(q, fn, ...) _NV_TARGET_IF(q, fn, _NV_TARGET_DISPATCH_HANDLE6(__VA_ARGS__))
|
||||
#define _NV_TARGET_DISPATCH_HANDLE10(q, fn, ...) _NV_TARGET_IF(q, fn, _NV_TARGET_DISPATCH_HANDLE8(__VA_ARGS__))
|
||||
#define _NV_TARGET_DISPATCH_HANDLE12(q, fn, ...) _NV_TARGET_IF(q, fn, _NV_TARGET_DISPATCH_HANDLE10(__VA_ARGS__))
|
||||
#define _NV_TARGET_DISPATCH_HANDLE14(q, fn, ...) _NV_TARGET_IF(q, fn, _NV_TARGET_DISPATCH_HANDLE12(__VA_ARGS__))
|
||||
#define _NV_TARGET_DISPATCH_HANDLE16(q, fn, ...) _NV_TARGET_IF(q, fn, _NV_TARGET_DISPATCH_HANDLE14(__VA_ARGS__))
|
||||
#define _NV_TARGET_DISPATCH_HANDLE18(q, fn, ...) _NV_TARGET_IF(q, fn, _NV_TARGET_DISPATCH_HANDLE16(__VA_ARGS__))
|
||||
#define _NV_TARGET_DISPATCH_HANDLE20(q, fn, ...) _NV_TARGET_IF(q, fn, _NV_TARGET_DISPATCH_HANDLE18(__VA_ARGS__))
|
||||
#define _NV_TARGET_DISPATCH_HANDLE22(q, fn, ...) _NV_TARGET_IF(q, fn, _NV_TARGET_DISPATCH_HANDLE20(__VA_ARGS__))
|
||||
#define _NV_TARGET_DISPATCH_HANDLE24(q, fn, ...) _NV_TARGET_IF(q, fn, _NV_TARGET_DISPATCH_HANDLE22(__VA_ARGS__))
|
||||
#define _NV_TARGET_DISPATCH_HANDLE26(q, fn, ...) _NV_TARGET_IF(q, fn, _NV_TARGET_DISPATCH_HANDLE24(__VA_ARGS__))
|
||||
#define _NV_TARGET_DISPATCH_HANDLE28(q, fn, ...) _NV_TARGET_IF(q, fn, _NV_TARGET_DISPATCH_HANDLE26(__VA_ARGS__))
|
||||
#define _NV_TARGET_DISPATCH_HANDLE30(q, fn, ...) _NV_TARGET_IF(q, fn, _NV_TARGET_DISPATCH_HANDLE28(__VA_ARGS__))
|
||||
#define _NV_TARGET_DISPATCH_HANDLE32(q, fn, ...) _NV_TARGET_IF(q, fn, _NV_TARGET_DISPATCH_HANDLE30(__VA_ARGS__))
|
||||
#define _NV_TARGET_DISPATCH_HANDLE34(q, fn, ...) _NV_TARGET_IF(q, fn, _NV_TARGET_DISPATCH_HANDLE32(__VA_ARGS__))
|
||||
|
||||
#define _NV_TARGET_DISPATCH(...) _NV_BLOCK_EXPAND(_NV_DISPATCH_N_ARY(_NV_TARGET_DISPATCH_HANDLE, __VA_ARGS__))
|
||||
|
||||
// NV_IF_TARGET supports a false statement provided as a variadic macro
|
||||
#define NV_IF_TARGET(cond, ...) _NV_BLOCK_EXPAND(_NV_TARGET_IF(cond, __VA_ARGS__))
|
||||
#define NV_IF_ELSE_TARGET(cond, t, f) _NV_BLOCK_EXPAND(_NV_TARGET_IF(cond, t, f))
|
||||
#define NV_DISPATCH_TARGET(...) _NV_TARGET_DISPATCH(__VA_ARGS__)
|
||||
|
||||
#endif // _NV__TARGET_MACROS
|
||||
250
qwen3_6_scripts/cccl_preload/include/nv/target
Normal file
250
qwen3_6_scripts/cccl_preload/include/nv/target
Normal file
@@ -0,0 +1,250 @@
|
||||
//===----------------------------------------------------------------------===//
|
||||
//
|
||||
// Part of libcu++, the C++ Standard Library for your entire system,
|
||||
// under the Apache License v2.0 with LLVM Exceptions.
|
||||
// See https://llvm.org/LICENSE.txt for license information.
|
||||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
||||
// SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
// This header contains a preview of a portability system that enables
|
||||
// CUDA C++ development with NVC++, NVCC, and supported host compilers.
|
||||
// These interfaces are not guaranteed to be stable.
|
||||
|
||||
#ifndef __NV_TARGET_H
|
||||
#define __NV_TARGET_H
|
||||
|
||||
#if defined(__NVCC__) || defined(__CUDACC_RTC__)
|
||||
# define _NV_COMPILER_NVCC
|
||||
#elif defined(__NVCOMPILER) && __cplusplus >= 201103L
|
||||
# define _NV_COMPILER_NVCXX
|
||||
#elif defined(__clang__) && defined(__CUDA__) && defined(__CUDA_ARCH__)
|
||||
// clang compiling CUDA code, device mode.
|
||||
# define _NV_COMPILER_CLANG_CUDA
|
||||
#endif
|
||||
|
||||
// Hide `if target` support from NVRTC and C
|
||||
// Some toolkit headers use <nv/target> in true C contexts
|
||||
#if !defined(__CUDACC_RTC__) && defined(__cplusplus)
|
||||
|
||||
# if defined(_NV_COMPILER_NVCXX)
|
||||
# define _NV_BITSET_ATTRIBUTE [[nv::__target_bitset]]
|
||||
# else
|
||||
# define _NV_BITSET_ATTRIBUTE
|
||||
# endif
|
||||
|
||||
// This must be a nested namespace as <nv/target> works with older dialects.
|
||||
namespace nv // NOLINT(modernize-concat-nested-namespaces)
|
||||
{
|
||||
namespace target // NOLINT(modernize-concat-nested-namespaces)
|
||||
{
|
||||
namespace detail
|
||||
{
|
||||
using base_int_t = unsigned long long;
|
||||
|
||||
// No host specialization
|
||||
constexpr base_int_t all_hosts = 1;
|
||||
|
||||
// NVIDIA GPUs
|
||||
constexpr base_int_t sm_35_bit = 1 << 1;
|
||||
constexpr base_int_t sm_37_bit = 1 << 2;
|
||||
constexpr base_int_t sm_50_bit = 1 << 3;
|
||||
constexpr base_int_t sm_52_bit = 1 << 4;
|
||||
constexpr base_int_t sm_53_bit = 1 << 5;
|
||||
constexpr base_int_t sm_60_bit = 1 << 6;
|
||||
constexpr base_int_t sm_61_bit = 1 << 7;
|
||||
constexpr base_int_t sm_62_bit = 1 << 8;
|
||||
constexpr base_int_t sm_70_bit = 1 << 9;
|
||||
constexpr base_int_t sm_72_bit = 1 << 10;
|
||||
constexpr base_int_t sm_75_bit = 1 << 11;
|
||||
constexpr base_int_t sm_80_bit = 1 << 12;
|
||||
constexpr base_int_t sm_86_bit = 1 << 13;
|
||||
constexpr base_int_t sm_87_bit = 1 << 14;
|
||||
constexpr base_int_t sm_88_bit = 1 << 15;
|
||||
constexpr base_int_t sm_89_bit = 1 << 16;
|
||||
constexpr base_int_t sm_90_bit = 1 << 17;
|
||||
constexpr base_int_t sm_100_bit = 1 << 18;
|
||||
constexpr base_int_t sm_103_bit = 1 << 19;
|
||||
constexpr base_int_t sm_107_bit = 1 << 20;
|
||||
constexpr base_int_t sm_110_bit = 1 << 21;
|
||||
constexpr base_int_t sm_120_bit = 1 << 22;
|
||||
constexpr base_int_t sm_121_bit = 1 << 23;
|
||||
constexpr base_int_t all_devices =
|
||||
sm_35_bit | sm_37_bit | sm_50_bit | sm_52_bit | sm_53_bit | sm_60_bit | sm_61_bit | sm_62_bit | sm_70_bit | sm_72_bit
|
||||
| sm_75_bit | sm_80_bit | sm_86_bit | sm_87_bit | sm_88_bit | sm_89_bit | sm_90_bit | sm_100_bit | sm_103_bit
|
||||
| sm_107_bit | sm_110_bit | sm_120_bit | sm_121_bit;
|
||||
|
||||
// Store a set of targets as a set of bits
|
||||
struct _NV_BITSET_ATTRIBUTE target_description
|
||||
{
|
||||
base_int_t targets;
|
||||
|
||||
constexpr target_description(base_int_t a)
|
||||
: targets(a)
|
||||
{}
|
||||
};
|
||||
|
||||
// The type of the user-visible names of the NVIDIA GPU targets
|
||||
enum class sm_selector : base_int_t
|
||||
{
|
||||
sm_35 = 35,
|
||||
sm_37 = 37,
|
||||
sm_50 = 50,
|
||||
sm_52 = 52,
|
||||
sm_53 = 53,
|
||||
sm_60 = 60,
|
||||
sm_61 = 61,
|
||||
sm_62 = 62,
|
||||
sm_70 = 70,
|
||||
sm_72 = 72,
|
||||
sm_75 = 75,
|
||||
sm_80 = 80,
|
||||
sm_86 = 86,
|
||||
sm_87 = 87,
|
||||
sm_88 = 88,
|
||||
sm_89 = 89,
|
||||
sm_90 = 90,
|
||||
sm_100 = 100,
|
||||
sm_103 = 103,
|
||||
sm_107 = 107,
|
||||
sm_110 = 110,
|
||||
sm_120 = 120,
|
||||
sm_121 = 121,
|
||||
};
|
||||
|
||||
constexpr base_int_t toint(sm_selector a)
|
||||
{
|
||||
return static_cast<base_int_t>(a);
|
||||
}
|
||||
|
||||
constexpr base_int_t bitexact(sm_selector a)
|
||||
{
|
||||
return toint(a) == 35 ? sm_35_bit
|
||||
: toint(a) == 37 ? sm_37_bit
|
||||
: toint(a) == 50 ? sm_50_bit
|
||||
: toint(a) == 52 ? sm_52_bit
|
||||
: toint(a) == 53 ? sm_53_bit
|
||||
: toint(a) == 60 ? sm_60_bit
|
||||
: toint(a) == 61 ? sm_61_bit
|
||||
: toint(a) == 62 ? sm_62_bit
|
||||
: toint(a) == 70 ? sm_70_bit
|
||||
: toint(a) == 72 ? sm_72_bit
|
||||
: toint(a) == 75 ? sm_75_bit
|
||||
: toint(a) == 80 ? sm_80_bit
|
||||
: toint(a) == 86 ? sm_86_bit
|
||||
: toint(a) == 87 ? sm_87_bit
|
||||
: toint(a) == 88 ? sm_88_bit
|
||||
: toint(a) == 89 ? sm_89_bit
|
||||
: toint(a) == 90 ? sm_90_bit
|
||||
: toint(a) == 100 ? sm_100_bit
|
||||
: toint(a) == 103 ? sm_103_bit
|
||||
: toint(a) == 107 ? sm_107_bit
|
||||
: toint(a) == 110 ? sm_110_bit
|
||||
: toint(a) == 120 ? sm_120_bit
|
||||
: toint(a) == 121 ? sm_121_bit
|
||||
: 0;
|
||||
}
|
||||
|
||||
constexpr base_int_t bitrounddown(sm_selector a)
|
||||
{
|
||||
return toint(a) >= 121 ? sm_121_bit
|
||||
: toint(a) >= 120 ? sm_120_bit
|
||||
: toint(a) >= 110 ? sm_110_bit
|
||||
: toint(a) >= 107 ? sm_107_bit
|
||||
: toint(a) >= 103 ? sm_103_bit
|
||||
: toint(a) >= 100 ? sm_100_bit
|
||||
: toint(a) >= 90 ? sm_90_bit
|
||||
: toint(a) >= 89 ? sm_89_bit
|
||||
: toint(a) >= 88 ? sm_88_bit
|
||||
: toint(a) >= 87 ? sm_87_bit
|
||||
: toint(a) >= 86 ? sm_86_bit
|
||||
: toint(a) >= 80 ? sm_80_bit
|
||||
: toint(a) >= 75 ? sm_75_bit
|
||||
: toint(a) >= 72 ? sm_72_bit
|
||||
: toint(a) >= 70 ? sm_70_bit
|
||||
: toint(a) >= 62 ? sm_62_bit
|
||||
: toint(a) >= 61 ? sm_61_bit
|
||||
: toint(a) >= 60 ? sm_60_bit
|
||||
: toint(a) >= 53 ? sm_53_bit
|
||||
: toint(a) >= 52 ? sm_52_bit
|
||||
: toint(a) >= 50 ? sm_50_bit
|
||||
: toint(a) >= 37 ? sm_37_bit
|
||||
: toint(a) >= 35 ? sm_35_bit
|
||||
: 0;
|
||||
}
|
||||
|
||||
// Public API for NVIDIA GPUs
|
||||
|
||||
constexpr target_description is_exactly(sm_selector a)
|
||||
{
|
||||
return target_description(bitexact(a));
|
||||
}
|
||||
|
||||
constexpr target_description provides(sm_selector a)
|
||||
{
|
||||
return target_description(~(bitrounddown(a) - 1) & all_devices);
|
||||
}
|
||||
|
||||
// Boolean operations on target sets
|
||||
|
||||
constexpr target_description operator&&(target_description a, target_description b)
|
||||
{
|
||||
return target_description(a.targets & b.targets);
|
||||
}
|
||||
|
||||
constexpr target_description operator||(target_description a, target_description b)
|
||||
{
|
||||
return target_description(a.targets | b.targets);
|
||||
}
|
||||
|
||||
constexpr target_description operator!(target_description a)
|
||||
{
|
||||
return target_description(~a.targets & (all_devices | all_hosts));
|
||||
}
|
||||
} // namespace detail
|
||||
|
||||
using detail::sm_selector;
|
||||
using detail::target_description;
|
||||
|
||||
// The predicates for basic host/device selection
|
||||
constexpr target_description is_host = target_description(detail::all_hosts);
|
||||
constexpr target_description is_device = target_description(detail::all_devices);
|
||||
constexpr target_description any_target = target_description(detail::all_hosts | detail::all_devices);
|
||||
constexpr target_description no_target = target_description(0);
|
||||
|
||||
// The public names for NVIDIA GPU architectures
|
||||
constexpr sm_selector sm_35 = sm_selector::sm_35;
|
||||
constexpr sm_selector sm_37 = sm_selector::sm_37;
|
||||
constexpr sm_selector sm_50 = sm_selector::sm_50;
|
||||
constexpr sm_selector sm_52 = sm_selector::sm_52;
|
||||
constexpr sm_selector sm_53 = sm_selector::sm_53;
|
||||
constexpr sm_selector sm_60 = sm_selector::sm_60;
|
||||
constexpr sm_selector sm_61 = sm_selector::sm_61;
|
||||
constexpr sm_selector sm_62 = sm_selector::sm_62;
|
||||
constexpr sm_selector sm_70 = sm_selector::sm_70;
|
||||
constexpr sm_selector sm_72 = sm_selector::sm_72;
|
||||
constexpr sm_selector sm_75 = sm_selector::sm_75;
|
||||
constexpr sm_selector sm_80 = sm_selector::sm_80;
|
||||
constexpr sm_selector sm_86 = sm_selector::sm_86;
|
||||
constexpr sm_selector sm_87 = sm_selector::sm_87;
|
||||
constexpr sm_selector sm_88 = sm_selector::sm_88;
|
||||
constexpr sm_selector sm_89 = sm_selector::sm_89;
|
||||
constexpr sm_selector sm_90 = sm_selector::sm_90;
|
||||
constexpr sm_selector sm_100 = sm_selector::sm_100;
|
||||
constexpr sm_selector sm_103 = sm_selector::sm_103;
|
||||
constexpr sm_selector sm_107 = sm_selector::sm_107;
|
||||
constexpr sm_selector sm_110 = sm_selector::sm_110;
|
||||
constexpr sm_selector sm_120 = sm_selector::sm_120;
|
||||
constexpr sm_selector sm_121 = sm_selector::sm_121;
|
||||
|
||||
using detail::is_exactly;
|
||||
using detail::provides;
|
||||
} // namespace target
|
||||
} // namespace nv
|
||||
|
||||
#endif // C++ && !defined(__CUDACC_RTC__)
|
||||
|
||||
#include <nv/detail/__target_macros>
|
||||
|
||||
#endif // __NV_TARGET_H
|
||||
Reference in New Issue
Block a user