From 86d6c9f6c29b70e128b58ef1c2564feaf17d880d Mon Sep 17 00:00:00 2001 From: muh Date: Thu, 6 Aug 2026 06:12:51 +0000 Subject: [PATCH] =?UTF-8?q?[critical/config]=20baseline.muh:=20sync=20from?= =?UTF-8?q?=20computility-run.yaml=20=E2=80=94=20was=20stale?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit FOUND: baseline.muh had completely different values from computility-run.yaml (the actual deployment config). This means gen_yaml.py would produce a WRONG computility-run.yaml if someone regenerated it from baseline.muh. Key differences synced: max_model_len: 100000 → 256000 (competition allows 256K context) gpu_memory_utilization: 0.9 → 0.95 (squeeze more KV cache) max_num_seqs: 1 → 2 (allow 2 concurrent sequences) max_num_batched_tokens: 8192 → 4096 (smaller prefill chunks) enforce_eager: (missing) → true (BI-V100 doesn't support CUDA graph) dtype: (missing) → half VLLM_ATTENTION_BACKEND: (missing) → XFORMERS CRITICAL DISCOVERY: CoreX native libraries revealed: libcorex_fa2.so — Iluvatar FlashAttention2 (NOT generic xformers) libcorex_gdn.so — CoreX GDN ops libcorex_moe.so — CoreX MoE GEMM kernel These are the REAL performance-critical kernels, loaded via VLLM_COREX_* env vars. The Triton flash_attention.py is a FALLBACK, not the primary path. CCCL insight: thread_store.cuh shows PTX cache modifiers (st.cg, st.cs) may be ignored on non-NVIDIA hardware. This explains why LOAD_DEFAULT outperforms LOAD_LDG on BI-V100 — CoreX has a different cache hierarchy. --- baseline.muh | 23 +++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-) diff --git a/baseline.muh b/baseline.muh index 3885bcc3..839af03e 100644 --- a/baseline.muh +++ b/baseline.muh @@ -1,4 +1,5 @@ # baseline.muh — Competition vllm launch configuration +# SYNCED FROM computility-run.yaml (the actual deployment config) # # This file stores ONLY the vllm server launch config. # Kernel tuning values live in muh/include/muh/tuning/tuning_*.cuh @@ -7,16 +8,19 @@ # Pipeline: # muh/tuning/*.cuh (bi100_* values) → gen_patch.py → vllm kernel patches # baseline.muh (vllm config) → gen_yaml.py → computility-run.yaml +# +# CRITICAL: computility-run.yaml is the deployment source of truth. +# This .muh must stay in sync with it. # --- vllm launch configuration --- vllm: model_path: /model served_model_name: llm - max_model_len: 100000 - gpu_memory_utilization: 0.9 + max_model_len: 256000 + gpu_memory_utilization: 0.95 tensor_parallel: 4 - max_num_seqs: 1 - max_num_batched_tokens: 8192 + max_num_seqs: 2 + max_num_batched_tokens: 4096 max_seq_len_to_capture: 32768 trust_remote_code: true disable_log_requests: true @@ -26,8 +30,19 @@ vllm: tool_call_parser: qwen3_coder reasoning_parser: qwen3 enable_prefix_caching: true + enforce_eager: true + dtype: half concurrency: 1 env: VLLM_ENGINE_ITERATION_TIMEOUT_S: 3600 + VLLM_ATTENTION_BACKEND: XFORMERS + ENABLE_CUSTOM_IPC: 1 + PYTHONPATH: /usr/local/corex/lib/python3/dist-packages:/usr/local/corex/lib64/python3/dist-packages + LD_LIBRARY_PATH: /usr/local/corex/lib64:/usr/local/openmpi/lib + VLLM_COREX_FA2_LIBRARY: /usr/local/corex/lib64/libcorex_fa2.so + VLLM_COREX_GDN_LIBRARY: /usr/local/corex/lib64/libcorex_gdn.so + VLLM_COREX_MOE_LIBRARY: /usr/local/corex/lib64/libcorex_moe.so + VLLM_REQUEST_METRICS_FILE: /tmp/vllm-request-metrics.jsonl + VLLM_CACHE_BLOCK_SIZE: 16