[INFRA] Import NVIDIA/CCCL upstream as optimization reference library
CCCL (CUDA C++ Core Libraries) provides: - CUB: device/block/warp-level GPU primitives (reduce, scan, sort, topk) - Thrust: high-level parallel algorithms (transform_reduce, sort, scan) - libcudacxx: CUDA C++ standard library (atomics, barriers, memory) - cudax: experimental features (memory resources, allocators) - Tuning policies: per-SM hardware-specific algorithm parameters Competition optimization vectors mapped to CCCL: - Output TPS (83% weight): warp_reduce, block_reduce, device_topk - Input TPS (14% weight): device_scan, block_load, prefetch - Cache TPS (3% weight): prefix caching strategy patterns - Memory (0.9 util): pooled/cached/buddy allocators Source: https://github.com/NVIDIA/cccl (shallow clone, HEAD only) License: Apache-2.0
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117
cccl_upstream/cudax/test/stf/graph/graph_composition.cu
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117
cccl_upstream/cudax/test/stf/graph/graph_composition.cu
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//===----------------------------------------------------------------------===//
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//
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// Part of CUDASTF in CUDA C++ Core Libraries,
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// under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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// SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES.
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//
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//===----------------------------------------------------------------------===//
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/**
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* @file
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* @brief Generate a library call from nested CUDA graphs generated using algorithms
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*/
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#include <cuda/experimental/stf.cuh>
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using namespace cuda::experimental::stf;
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// Some fake library doing MATH
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void libMATH(graph_ctx ctx, logical_data<slice<double>> x, logical_data<slice<double>> y)
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{
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// We only want to have kernels with 4 CTAs to stress the system
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auto spec = par<4>(par<128>());
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ctx.launch(spec, exec_place::current_device(), x.read(), y.write()).set_symbol("MATH1")->*
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[] __device__(auto t, auto x, auto y) {
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for (auto i : t.apply_partition(shape(x)))
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{
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y(i) = cos(cos(x(i)));
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}
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};
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ctx.launch(spec, exec_place::current_device(), x.write(), y.read()).set_symbol("MATH2")->*
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[] __device__(auto t, auto x, auto y) {
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for (auto i : t.apply_partition(shape(x)))
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{
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x(i) = sin(sin(y(i)));
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};
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};
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}
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template <typename context_t>
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void libMATH_AS_GRAPH(context_t& ctx, logical_data<slice<double>> x, logical_data<slice<double>> y)
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{
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static algorithm alg;
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alg.run_as_task(libMATH, ctx, x.rw(), y.write());
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}
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// Some fake lib doing a SWAP
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template <typename context_t>
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void libSWAP(context_t& ctx, logical_data<slice<double>> x, logical_data<slice<double>> y)
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{
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// We only want to have kernels with 4 CTAs to stress the system
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auto spec = par<4>(par<128>());
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ctx.launch(spec, exec_place::current_device(), x.rw(), y.rw()).set_symbol("SWAP")->*
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[] __device__(auto t, auto x, auto y) {
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for (auto i : t.apply_partition(shape(x)))
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{
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auto tmp = x(i);
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x(i) = y(i);
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y(i) = tmp;
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}
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};
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}
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template <typename context_t>
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logical_data<slice<double>> libCOPY(context_t& ctx, logical_data<slice<double>> x)
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{
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logical_data<slice<double>> res = ctx.logical_data(x.shape());
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// We only want to have kernels with 4 CTAs to stress the system
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auto spec = par<4>(par<128>());
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ctx.launch(spec, exec_place::current_device(), x.read(), res.write()).set_symbol("SWAP")->*
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[] __device__(auto t, auto x, auto res) {
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for (auto i : t.apply_partition(shape(x)))
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{
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res(i) = x(i);
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}
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};
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return res;
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}
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int main()
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{
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nvtx_range r("run");
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stream_ctx ctx;
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const size_t N = 256 * 1024;
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const size_t K = 8;
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logical_data<slice<double>> lX[K];
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logical_data<slice<double>> lY[K];
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for (size_t i = 0; i < K; i++)
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{
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lX[i] = ctx.logical_data<double>(N);
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lY[i] = ctx.logical_data<double>(N);
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ctx.parallel_for(lX[i].shape(), lX[i].write(), lY[i].write()).set_symbol("INIT")->*
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[] __device__(size_t i, auto x, auto y) {
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x(i) = 2.0 * i + 12.0;
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y(i) = -3.0 * i + 17.0;
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};
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}
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for (size_t i = 0; i < K; i++)
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{
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auto tmp = libCOPY(ctx, lX[i]);
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libSWAP(ctx, tmp, lY[i]);
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libMATH_AS_GRAPH(ctx, lX[i], lY[i]);
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libSWAP(ctx, lX[i], lY[i]);
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}
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ctx.finalize();
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}
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