[INFRA] Import NVIDIA/CCCL upstream as optimization reference library
CCCL (CUDA C++ Core Libraries) provides: - CUB: device/block/warp-level GPU primitives (reduce, scan, sort, topk) - Thrust: high-level parallel algorithms (transform_reduce, sort, scan) - libcudacxx: CUDA C++ standard library (atomics, barriers, memory) - cudax: experimental features (memory resources, allocators) - Tuning policies: per-SM hardware-specific algorithm parameters Competition optimization vectors mapped to CCCL: - Output TPS (83% weight): warp_reduce, block_reduce, device_topk - Input TPS (14% weight): device_scan, block_load, prefetch - Cache TPS (3% weight): prefix caching strategy patterns - Memory (0.9 util): pooled/cached/buddy allocators Source: https://github.com/NVIDIA/cccl (shallow clone, HEAD only) License: Apache-2.0
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cccl_upstream/cudax/test/stf/examples/05-stencil2d-places.cu
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114
cccl_upstream/cudax/test/stf/examples/05-stencil2d-places.cu
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//===----------------------------------------------------------------------===//
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//
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// Part of CUDASTF in CUDA C++ Core Libraries,
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// under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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// SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES.
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//
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//===----------------------------------------------------------------------===//
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#include <cuda/experimental/__places/partitions/tiled_partition.cuh>
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#include <cuda/experimental/__stf/stream/stream_ctx.cuh>
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#include <cuda/experimental/__stf/utility/pretty_print.cuh>
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using namespace cuda::experimental::stf;
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template <typename T>
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__global__ void stencil2D_kernel(slice<T, 2> sUn, slice<const T, 2> sUn1)
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{
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size_t N = sUn.extent(0);
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for (size_t i = threadIdx.x + blockIdx.x * blockDim.x; i < N; i += blockDim.x * gridDim.x)
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{
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for (size_t j = 0; j < N; j++)
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{
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sUn(j, i) = 0.8 * sUn1(j, i) + 0.05 * sUn1(j, (i + 1) % N) + 0.05 * sUn1(j, (i - 1 + N) % N)
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+ 0.05 * sUn1((j + 1) % N, i) + 0.05 * sUn1((j - 1 + N) % N, i);
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}
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}
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}
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int main(int argc, char** argv)
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{
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stream_ctx ctx;
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size_t NITER = 500;
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size_t N = 1000;
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bool vtk_dump = false;
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if (argc > 1)
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{
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NITER = atoi(argv[1]);
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}
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if (argc > 2)
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{
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N = atoi(argv[2]);
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}
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if (argc > 3)
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{
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int val = atoi(argv[3]);
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vtk_dump = (val == 1);
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}
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size_t TOTAL_SIZE = N * N;
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double* Un = new double[TOTAL_SIZE];
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double* Un1 = new double[TOTAL_SIZE];
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for (size_t idx = 0; idx < TOTAL_SIZE; idx++)
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{
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Un[idx] = (idx == 0) ? 1.0 : 0.0;
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Un1[idx] = Un[idx];
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}
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auto lUn = ctx.logical_data(make_slice(Un, std::tuple{N, N}, N));
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auto lUn1 = ctx.logical_data(make_slice(Un1, std::tuple{N, N}, N));
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// std::shared_ptr<execution_grid> all_devs = exec_place::all_devices();
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// use grid [ 0 0 0 0 ] for debugging purpose
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auto all_devs = exec_place::repeat(exec_place::device(0), 4);
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// Partition over the vector of processor along the y-axis of the data domain
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// TODO implement the proper tiled_partitioning along y !
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data_place cdp = data_place::composite(tiled_partition<128>(), all_devs);
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for (size_t iter = 0; iter < NITER; iter++)
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{
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// UPDATE Un from Un1
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ctx.task(lUn.rw(cdp), lUn1.read(cdp))->*[&](auto stream, auto sUn, auto sUn1) {
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stencil2D_kernel<double><<<32, 128, 0, stream>>>(sUn, sUn1);
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};
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// We make sure that the total sum of elements remains constant
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if (iter % 250 == 0)
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{
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double sum = 0.0;
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ctx.task(exec_place::host(), lUn.read())->*[&](auto stream, auto sUn) {
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cuda_safe_call(cudaStreamSynchronize(stream));
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for (size_t j = 0; j < N; j++)
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{
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for (size_t i = 0; i < N; i++)
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{
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sum += sUn(j, i);
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}
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}
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if (vtk_dump)
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{
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char str[32];
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snprintf(str, 32, "Un_%05zu.vtk", iter);
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mdspan_to_vtk(sUn, std::string(str));
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}
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};
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// fprintf(stderr, "iter %d : CHECK SUM = %e\n", iter, sum);
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}
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std::swap(lUn, lUn1);
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}
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ctx.finalize();
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}
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