[INFRA] Import NVIDIA/CCCL upstream as optimization reference library
CCCL (CUDA C++ Core Libraries) provides: - CUB: device/block/warp-level GPU primitives (reduce, scan, sort, topk) - Thrust: high-level parallel algorithms (transform_reduce, sort, scan) - libcudacxx: CUDA C++ standard library (atomics, barriers, memory) - cudax: experimental features (memory resources, allocators) - Tuning policies: per-SM hardware-specific algorithm parameters Competition optimization vectors mapped to CCCL: - Output TPS (83% weight): warp_reduce, block_reduce, device_topk - Input TPS (14% weight): device_scan, block_load, prefetch - Cache TPS (3% weight): prefix caching strategy patterns - Memory (0.9 util): pooled/cached/buddy allocators Source: https://github.com/NVIDIA/cccl (shallow clone, HEAD only) License: Apache-2.0
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cccl_upstream/cub/benchmarks/bench/partition/three_way.cu
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cccl_upstream/cub/benchmarks/bench/partition/three_way.cu
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// SPDX-FileCopyrightText: Copyright (c) 2011-2023, NVIDIA CORPORATION. All rights reserved.
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// SPDX-License-Identifier: BSD-3
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#include <cub/device/device_partition.cuh>
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#include <look_back_helper.cuh>
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#include <nvbench_helper.cuh>
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// %RANGE% TUNE_TRANSPOSE trp 0:1:1
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// %RANGE% TUNE_ITEMS_PER_THREAD ipt 7:24:1
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// %RANGE% TUNE_THREADS_PER_BLOCK tpb 128:1024:32
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// %RANGE% TUNE_MAGIC_NS ns 0:2048:4
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// %RANGE% TUNE_DELAY_CONSTRUCTOR_ID dcid 0:7:1
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// %RANGE% TUNE_L2_WRITE_LATENCY_NS l2w 0:1200:5
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#if !TUNE_BASE
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template <typename InputT>
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struct policy_selector
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{
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[[nodiscard]] _CCCL_HOST_DEVICE constexpr auto operator()(cuda::compute_capability) const
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-> cub::ThreeWayPartitionPolicy
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{
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return {cub::ThreeWayPartitionAlgorithm::lookback,
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{TUNE_THREADS_PER_BLOCK,
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TUNE_ITEMS_PER_THREAD,
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TUNE_TRANSPOSE == 0 ? cub::BLOCK_LOAD_DIRECT : cub::BLOCK_LOAD_WARP_TRANSPOSE,
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cub::LOAD_DEFAULT,
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cub::BLOCK_SCAN_WARP_SCANS,
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lookback_delay_policy}};
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}
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};
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#endif // !TUNE_BASE
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template <typename T, typename OffsetT>
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void partition(nvbench::state& state, nvbench::type_list<T, OffsetT>)
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{
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using select_op_t = less_then_t<T>;
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using offset_t = OffsetT;
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// Retrieve axis parameters
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const auto elements = static_cast<std::size_t>(state.get_int64("Elements{io}"));
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const bit_entropy entropy = str_to_entropy(state.get_string("Entropy"));
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T min_val{};
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T max_val = ::cuda::std::numeric_limits<T>::max();
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T left_border = max_val / 3;
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T right_border = left_border * 2;
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select_op_t select_op_1{left_border};
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select_op_t select_op_2{right_border};
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thrust::device_vector<T> in = generate(elements, entropy, min_val, max_val);
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thrust::device_vector<offset_t> num_selected(2);
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thrust::device_vector<T> out_1(elements);
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thrust::device_vector<T> out_2(elements);
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thrust::device_vector<T> out_3(elements);
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const T* d_in = thrust::raw_pointer_cast(in.data());
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T* d_out_1 = thrust::raw_pointer_cast(out_1.data());
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T* d_out_2 = thrust::raw_pointer_cast(out_2.data());
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T* d_out_3 = thrust::raw_pointer_cast(out_3.data());
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offset_t* d_num_selected = thrust::raw_pointer_cast(num_selected.data());
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state.add_element_count(elements);
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state.add_global_memory_reads<T>(elements);
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state.add_global_memory_writes<T>(elements);
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state.add_global_memory_writes<offset_t>(2);
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caching_allocator_t alloc;
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state.exec(nvbench::exec_tag::gpu | nvbench::exec_tag::no_batch, [&](nvbench::launch& launch) {
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auto env = cub_bench_env(
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alloc,
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launch
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#if !TUNE_BASE
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,
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cuda::execution::tune(policy_selector<T>{})
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#endif // !TUNE_BASE
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);
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_CCCL_TRY_CUDA_API(
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cub::DevicePartition::If,
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"If three-way failed",
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d_in,
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d_out_1,
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d_out_2,
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d_out_3,
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d_num_selected,
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static_cast<offset_t>(elements),
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select_op_1,
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select_op_2,
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env);
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});
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}
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NVBENCH_BENCH_TYPES(partition, NVBENCH_TYPE_AXES(fundamental_types, offset_types))
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.set_name("base")
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.set_type_axes_names({"T{ct}", "OffsetT{ct}"})
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.add_int64_power_of_two_axis("Elements{io}", nvbench::range(16, 28, 4))
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.add_string_axis("Entropy", {"1.000", "0.544", "0.000"});
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