This website requires JavaScript.
Explore
Help
Register
Sign In
Nellyw888
/
VeriReason-Qwen2.5-3b-RTLCoder-Verilog-GRPO-reasoning-tb
Watch
1
Star
0
Fork
0
You've already forked VeriReason-Qwen2.5-3b-RTLCoder-Verilog-GRPO-reasoning-tb
Code
Issues
Pull Requests
Actions
Projects
Releases
Wiki
Activity
1
Commit
1
Branch
0
Tags
f2377b9856e3595fbe2f7a7a36b57cc5a9fd4a87
Commit Graph
1 Commits
Author
SHA1
Message
Date
ModelHub XC
f2377b9856
初始化项目,由ModelHub XC社区提供模型
...
Model: Nellyw888/VeriReason-Qwen2.5-3b-RTLCoder-Verilog-GRPO-reasoning-tb Source: Original Platform
2026-05-31 22:19:26 +08:00