Nellyw888/VeriReason-Qwen2.5-3b-RTLCoder-Verilog-GRPO-reasoning-tb
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初始化项目，由ModelHub XC社区提供模型 Model: Nellyw888/VeriReason-Qwen2.5-3b-RTLCoder-Verilog-GRPO-reasoning-tb Source: Original Platform
2026-05-31 22:19:26 +08:00
version https://git-lfs.github.com/spec/v1
oid sha256:b1e6e3b5d04d859443149ff31993c3c42c4b5dd6179b5b7fc5410e6298583682
size 4957560304
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