### What this PR does / why we need it?
#### 1. fix spec ut in vllm-ascend main and vllm main
As https://github.com/vllm-project/vllm-ascend/pull/694 and
https://github.com/vllm-project/vllm-ascend/pull/749 verify, Now,
vllm-ascend main and vllm 0.8.5, spec UT is happy, but vllm-ascend main
and vllm main, CI is fail.
I found the reason is a triton bug
https://github.com/triton-lang/triton/issues/2266, but i I didn't figure
it out that why the bug did not effect vllm-ascend main and vllm 0.8.5,
maybe the usage of triton have changed when vllm 0.8.5 to latest main
As the bug describe, I changed the minimum block_size in UT from 8 to
16, and the modification is verified locally to be effective.
#### 2. modify some case skip form.
I modified some commented out cases to skipif form, which is more
standardized.
### Does this PR introduce _any_ user-facing change?
None
### How was this patch tested?
CI
Signed-off-by: mengwei805 <mengwei25@huawei.com>
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