linfeng-yuan 490ddf536f [perf][dsv3.2][async_scheduling] improve dsv3.2 performance by eliminating HD synchronization (#4805) ...

### What this PR does / why we need it?
This PR eliminates the simplicit HD synchronization in sfa backend, and
_build_dummy_attn_metadata and dummy_run in mtp_proposer, significantly
improving dsv3.2 performance in low-latency scenarios.
### Does this PR introduce _any_ user-facing change?
No.
### How was this patch tested?
Performance improvements are observed with E2E performance serving (P:
DP4TP8EP32 D: DP8TP4EP32) with `num_speculative_tokens=3`.

DSV3.2-W8A8-EXP:
TPOT: 41.67ms -> 23.36ms
ITL: 85.93ms -> 55.96ms

DSV3.2-W8A8 (relaesed in December):
TPOT: 18.11ms
ITL: 56.13ms
 

- vLLM version: v0.12.0
- vLLM main:
ad32e3e19c

Signed-off-by: linfeng-yuan <1102311262@qq.com>

2025-12-10 22:31:47 +08:00

..

__init__.py

[Misc][V0 Deprecation] Remove Cache Engine Used for V0 Worker (#1878)

2025-07-19 09:42:32 +08:00

block_table.py

[long_seq] remove long_seq env (#4660)

2025-12-05 10:31:49 +08:00

model_runner_v1.py

[perf][dsv3.2][async_scheduling] improve dsv3.2 performance by eliminating HD synchronization (#4805)

2025-12-10 22:31:47 +08:00

npu_input_batch.py

[Model] Support pooling models (#3122)

2025-12-10 11:37:57 +08:00

worker_v1.py

mooncake connector support pipeline parallel & fix pp with flashcomm1 (#4054)

2025-12-10 16:01:43 +08:00