### What this PR does / why we need it?
To support tensorList for dispatch_ffn_combine, to adjust eplb
### Does this PR introduce _any_ user-facing change?
N/A
### How was this patch tested?
Single Operator Testing
- vLLM version: v0.13.0
- vLLM main:
2f4e6548ef
---------
Signed-off-by: lhchg <lhao_cheng@163.com>
Co-authored-by: lihaocheng <lihaosheng1@h-partners.com>
446 lines
18 KiB
C++
446 lines
18 KiB
C++
#include <torch/extension.h>
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#include <torch/library.h>
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#include <torch/version.h>
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#include <torch_npu/csrc/core/npu/NPUStream.h>
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#include <torch_npu/csrc/framework/OpCommand.h>
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#include <torch_npu/csrc/npu/Module.h>
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#include "utils.h"
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/*
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* How to write a meta implementation for a custom operator (meta kernel):
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*
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* Meta implementations are used for shape and dtype inference, tracing, and export.
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* They do NOT perform any real computation or allocate device memory.
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* Instead, they return empty tensors with the correct shapes, dtypes, and device types.
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*
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* Steps to write a meta implementation:
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* 1. The function signature should match the operator's schema, but only use the arguments
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* necessary to infer output shapes and dtypes.
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* 2. Use input tensor shapes, dtypes, and any relevant arguments to compute the output shapes.
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* 3. Return empty tensors (e.g., at::empty_symint, at::empty_like) with the correct shape and dtype.
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* 4. Do NOT perform any real computation or data movement.
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* 5. Register the meta implementation with the "Meta" dispatch key using TORCH_LIBRARY_IMPL or similar.
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*
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* Example:
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* std::tuple<at::Tensor, at::Tensor> my_op_meta(
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* at::Tensor &input, int64_t some_param) {
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* // Infer output shape based on input and parameters
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* auto out_shape = ...;
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* at::Tensor out = at::empty_symint(out_shape, input.options());
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* // Return empty tensor(s) with correct shape/dtype
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* return {out, ...};
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* }
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*
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* See below for real examples.
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*/
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namespace vllm_ascend {
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namespace meta {
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const int64_t INT4_NUMS_IN_INT32 = 8;
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std::tuple<at::Tensor, at::Tensor> rotary_embedding_meta(
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at::Tensor &positions,
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at::Tensor &query,
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at::Tensor &key,
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int64_t head_size,
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at::Tensor &cos_sin_cache,
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bool is_neox) {
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auto num_tokens = positions.sym_numel();
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auto query_hidden_size = query.sym_numel() / num_tokens;
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auto key_hidden_size = key.sym_numel() / num_tokens;
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auto num_heads = query_hidden_size / head_size;
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auto num_kv_heads = key_hidden_size / head_size;
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at::Tensor query_dst = at::empty_symint({num_tokens, num_heads, head_size}, query.options());
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at::Tensor key_dst = at::empty_symint({num_tokens, num_kv_heads, head_size}, key.options());
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return {query_dst, key_dst};
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}
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std::tuple<at::Tensor, at::Tensor> get_masked_input_and_mask_meta(
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at::Tensor &input,
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const int64_t org_vocab_start_index,
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const int64_t org_vocab_end_index,
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const int64_t num_org_vocab_padding,
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const int64_t added_vocab_start_index,
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const int64_t added_vocab_end_index) {
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at::Tensor masked_input = at::empty_like(input);
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at::Tensor mask = at::empty_like(input, input.options().dtype(at::kBool));
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return {masked_input, mask};
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}
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at::Tensor bgmv_expand_meta(at::Tensor &x, at::Tensor &weight, at::Tensor &indices, at::Tensor &y,
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int64_t slice_offset, int64_t slice_size) {
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at::Tensor y_out = at::empty_like(y);
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return y_out;
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}
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at::Tensor sgmv_expand_meta(at::Tensor &x, at::Tensor &weight, at::Tensor &lora_indices, at::Tensor &seq_len,
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at::Tensor &y, int64_t slice_offset, int64_t slice_size) {
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at::Tensor y_out = at::empty_like(y);
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return y_out;
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}
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std::tuple<at::Tensor &, at::Tensor &, at::Tensor &, at::Tensor &, at::Tensor &> mla_preprocess(
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const at::Tensor &hiddenState,
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const at::Tensor &wdqkv,
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const c10::optional<at::Tensor> &descale0,
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const at::Tensor &gamma1,
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const c10::optional<at::Tensor> &beta1,
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const at::Tensor &wuq,
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const c10::optional<at::Tensor> &descale1,
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const at::Tensor &gamma2,
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const at::Tensor &cos,
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const at::Tensor &sin,
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const at::Tensor &wuk,
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const at::Tensor &kv_cache,
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const at::Tensor &kv_cache_rope,
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const at::Tensor &slotmapping,
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const c10::optional<at::Tensor> &quant_scale0,
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const c10::optional<at::Tensor> &quant_offset0,
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const c10::optional<at::Tensor> &bias0,
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const c10::optional<at::Tensor> &quant_scale1,
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const c10::optional<at::Tensor> &quant_offset1,
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const c10::optional<at::Tensor> &bias1,
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const c10::optional<at::Tensor> &ctkv_scale,
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const c10::optional<at::Tensor> &q_nope_scale,
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c10::optional<c10::string_view> cache_mode,
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c10::optional<c10::string_view> quant_mode,
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c10::optional<bool> enable_inner_out,
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at::Tensor &q_out0,
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at::Tensor &kv_cache_out0,
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at::Tensor &q_out1,
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at::Tensor &kv_cache_out1,
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at::Tensor &inner_out
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)
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{
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return {q_out0, kv_cache_out0, q_out1, kv_cache_out1, inner_out};
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}
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std::tuple<at::Tensor, at::Tensor, at::Tensor> grouped_matmul_swiglu_quant(
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const at::Tensor &x, const at::Tensor &weight, const at::Tensor &weight_scale, const at::Tensor &x_scale,
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const at::Tensor &group_list, const c10::optional<at::Tensor> &bias, const c10::optional<at::Tensor> &offset)
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{
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int m = x.sizes()[0];
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int n = weight.sizes()[2];
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bool is_a8w4 = x.dtype() == at::kChar && weight.dtype() == at::kInt;
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if (is_a8w4) {
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n *= INT4_NUMS_IN_INT32;
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}
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at::Tensor output = at::empty({m, n/2}, x.options().dtype(c10::ScalarType::Char));
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at::Tensor output_scale = at::empty({m}, x.options().dtype(c10::ScalarType::Float));
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at::Tensor output_offset = at::empty({}, x.options().dtype(c10::ScalarType::Float));
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return {output, output_scale, output_offset};
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}
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std::tuple<at::Tensor, at::Tensor, at::Tensor> grouped_matmul_swiglu_quant_weight_nz_tensor_list_meta(
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const at::Tensor & x,
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const at::TensorList & weight,
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const at::TensorList & weight_scale,
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const at::Tensor & x_scale,
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const at::Tensor & group_list,
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const c10::optional<at::Tensor> & bias,
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const c10::optional<at::Tensor> & offset)
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{
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auto x_size = x.sizes();
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int n = weight[0].sizes()[1];
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int m = x_size[0];
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int k = x_size[1];
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at::Tensor output = at::zeros({m, n/2}, c10::dtype(c10::ScalarType::Char));
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at::Tensor output_scale = at::zeros({m}, c10::dtype(c10::ScalarType::Float));
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at::Tensor output_offset = at::zeros({m}, c10::dtype(c10::ScalarType::Float));
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return std::tuple<at::Tensor, at::Tensor, at::Tensor>(output, output_scale, output_offset);
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}
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std::tuple<at::Tensor, at::Tensor> dispatch_gmm_combine_decode_meta(
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const at::Tensor &x,
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const at::Tensor &expert_ids,
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const at::TensorList &gmm1_permuted_weight,
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const at::TensorList &gmm1_permuted_weight_scale,
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const at::TensorList &gmm2_weight,
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const at::TensorList &gmm2_weight_scale,
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const at::Tensor &expert_scales,
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const c10::optional<at::Tensor> &expert_smooth_scales,
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const c10::optional<at::Tensor> &x_active_mask,
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c10::string_view group_ep,
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int64_t ep_rank_size,
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int64_t ep_rank_id,
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int64_t moe_expert_num,
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int64_t shared_expert_num,
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int64_t shared_expert_rank_num,
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int64_t quant_mode,
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int64_t global_bs)
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{
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auto x_shape = x.sizes();
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int bs = x_shape[0];
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int h = x_shape[1];
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at::Tensor output = at::empty({bs, h}, x.options().device(at::kMeta));
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bool is_shared_expert = (ep_rank_id < shared_expert_rank_num);
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int64_t num_local_experts = is_shared_expert ? 1 : moe_expert_num / (ep_rank_size - shared_expert_rank_num);
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auto opts = expert_ids.options().dtype(at::kLong);
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at::Tensor expert_token_nums = at::empty({num_local_experts}, opts.device(at::kMeta));
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return {output, expert_token_nums};
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}
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void batch_matmul_transpose(const at::Tensor &tensor_a, const at::Tensor &tensor_b, at::Tensor &tensor_c,
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c10::optional<c10::string_view> format_mode,
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c10::optional<c10::string_view> quant_mode)
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{
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return;
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}
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at::Tensor& dispatch_ffn_combine_meta(
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const at::Tensor& x,
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const at::TensorList& weight1,
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const at::TensorList& weight2,
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const at::Tensor& expert_idx,
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const at::TensorList& scale1,
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const at::TensorList& scale2,
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const at::Tensor& probs,
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c10::string_view group,
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int64_t max_output_size,
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at::Tensor& out
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) {
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return out;
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}
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at::Tensor npu_lightning_indexer_meta(
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const at::Tensor &query, const at::Tensor &key, const at::Tensor &weights,
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const c10::optional<at::Tensor> &actual_seq_lengths_query,
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const c10::optional<at::Tensor> &actual_seq_lengths_key,
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const c10::optional<at::Tensor> &block_table, c10::string_view layout_query,
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c10::string_view layout_key, int64_t sparse_count, int64_t sparse_mode)
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{
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// npu tensor max size
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constexpr int32_t SIZE = 8;
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constexpr int32_t DIM_0 = 0;
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constexpr int32_t DIM_1 = 1;
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constexpr int32_t DIM_2 = 2;
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constexpr int32_t DIM_3 = 3;
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TORCH_CHECK(query.numel() > 0, "Query is empty.");
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TORCH_CHECK(key.numel() > 0, "Key is empty.");
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TORCH_CHECK(weights.numel() > 0, "Weights is empty.");
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for (size_t i = 0; i < query.sizes().size(); i++) {
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TORCH_CHECK(query.size(i) > 0, "All values within query's shape should be greater "
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"than 0, but shape[", i, "] is ", query.size(i));
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}
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TORCH_CHECK(sparse_count > 0, "sparse count should be greater than 0, but now is ", sparse_count);
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std::string query_layout_str = std::string(layout_query);
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std::string key_layout_str = std::string(layout_key);
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at::SmallVector<int64_t, SIZE> output_size;
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if (query_layout_str == "BSND") {
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output_size = {query.size(DIM_0), query.size(DIM_1), key.size(DIM_2), sparse_count};
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} else {
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int n_dim_index = 0;
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n_dim_index = (key_layout_str == "TND") ? DIM_1 : DIM_2;
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output_size = {query.size(DIM_0), key.size(n_dim_index), sparse_count};
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}
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// construct the output tensor
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at::Tensor lightning_indexer_output = at::empty(output_size, query.options().dtype(at::kInt));
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return lightning_indexer_output;
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}
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at::Tensor npu_sparse_flash_attention_meta(
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const at::Tensor &query, const at::Tensor &key, const at::Tensor &value,
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const at::Tensor &sparse_indices, double scale_value, int64_t sparse_block_size,
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const c10::optional<at::Tensor> &block_table,
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const c10::optional<at::Tensor> &actual_seq_lengths_query,
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const c10::optional<at::Tensor> &actual_seq_lengths_kv,
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const c10::optional<at::Tensor> &query_rope,
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const c10::optional<at::Tensor> &key_rope, c10::string_view layout_query,
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c10::string_view layout_kv,
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int64_t sparse_mode)
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{
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std::string layout_query_str = std::string(layout_query);
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for (size_t i = 0; i < query.sizes().size(); i++) {
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TORCH_CHECK(query.size(i) > 0, "All values within query's shape should be greater "
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"than 0, but shape[", i, "] is ", query.size(i));
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}
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at::Tensor output = at::empty(query.sizes(), query.options().dtype(query.dtype()));
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return output;
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}
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std::tuple<at::Tensor, at::Tensor> matmul_allreduce_add_rmsnorm_meta(
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const at::Tensor &x1,
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const at::Tensor &x2,
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const at::Tensor &residual,
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const at::Tensor &gamma,
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c10::string_view group_tp,
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int64_t tp_rank_size,
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int64_t tp_rank_id,
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double epsilon,
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bool is_trans_b,
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bool is_gather_add_out)
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{
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at::Tensor output = at::empty_like(residual);
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at::Tensor add_out = at::empty_like(residual);
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return {output, add_out};
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}
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std::tuple<at::Tensor, at::Tensor, at::Tensor, at::Tensor> npu_moe_init_routing_custom_meta(
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const at::Tensor &x, const at::Tensor &expert_idx,
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const c10::optional<at::Tensor> &scale, const c10::optional<at::Tensor> &offset, int64_t active_num,
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int64_t expert_capacity, int64_t expert_num, int64_t drop_pad_mode, int64_t expert_tokens_num_type,
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bool expert_tokens_num_flag, int64_t quant_mode, at::IntArrayRef active_expert_range, int64_t row_idx_type)
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{
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constexpr int64_t DIM_X = 2;
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constexpr int64_t DIM_EXPERT_IDX = 2;
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constexpr int64_t LENGTH_ACTIVE_EXPERT_RANGE = 2;
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constexpr int64_t EXPERT_TOKENS_COUNT = 1;
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constexpr int64_t EXPERT_TOKENS_KEY_VALUE = 2;
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constexpr int64_t QUANT_MODE_UNQUANT = -1;
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constexpr int64_t QUANT_MODE_DYNAMIC_QUANT = 1;
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constexpr int64_t CUMSUM = 0;
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constexpr int64_t COUNT = 1;
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constexpr int64_t KEY_VALUE = 2;
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if (active_expert_range.empty()) {
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active_expert_range = at::IntArrayRef({0, expert_num});
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}
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int64_t x_dim = x.dim();
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TORCH_CHECK(x_dim == DIM_X, "The x should be ", DIM_X,
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"-Dimension, current is ", x_dim, "-Dimension.");
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int64_t expert_idx_dim = expert_idx.dim();
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TORCH_CHECK(expert_idx_dim == DIM_EXPERT_IDX, "The expert_idx should be ", DIM_EXPERT_IDX,
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"-Dimension, current is ", expert_idx_dim, "-Dimension.");
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int64_t active_expert_range_length = active_expert_range.size();
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TORCH_CHECK(active_expert_range_length == LENGTH_ACTIVE_EXPERT_RANGE, "The active_expert_range should be ", LENGTH_ACTIVE_EXPERT_RANGE,
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"-Dimension, current is ", expert_idx_dim, "-Dimension.");
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int expert_length = active_expert_range[1] - active_expert_range[0];
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auto x_size = x.sizes();
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auto expert_idx_size = expert_idx.sizes();
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int bs = x_size[0];
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int h = x_size[1];
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int k = expert_idx_size[1];
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int64_t expanded_scale_len = 0;
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at::Tensor expanded_x;
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if (drop_pad_mode == 1) { // Drop/Pad
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if (quant_mode == QUANT_MODE_UNQUANT) {
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expanded_x = at::empty({expert_num, expert_capacity, h}, x.options());
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} else {
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expanded_x = at::empty({expert_num, expert_capacity, h}, x.options().dtype(at::kChar));
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}
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expanded_scale_len = expert_num * expert_capacity;
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} else { // Dropless / Active
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if (active_num > 0) { // Active
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int64_t num_out_tokens = std::min((int64_t)bs * k, active_num);
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if (quant_mode == QUANT_MODE_UNQUANT) {
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expanded_x = at::empty({num_out_tokens, h}, x.options());
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} else {
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expanded_x = at::empty({num_out_tokens, h}, x.options().dtype(at::kChar));
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}
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expanded_scale_len = num_out_tokens;
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} else { // Dropless
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if (quant_mode == QUANT_MODE_UNQUANT) {
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expanded_x = at::empty({bs * k, h}, x.options());
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} else {
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expanded_x = at::empty({bs * k, h}, x.options().dtype(at::kChar));
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}
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expanded_scale_len = bs * k;
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}
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}
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at::Tensor expanded_row_idx = at::empty({bs * k}, expert_idx.options());
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at::Tensor expert_tokens_count_or_cumsum;
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if (expert_tokens_num_type >= CUMSUM && expert_tokens_num_type <= COUNT) {
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// expert_tokens_count_or_cumsum in [end-start, ]
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expert_tokens_count_or_cumsum = at::empty({expert_length}, x.options().dtype(at::kLong));
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} else if (expert_tokens_num_type == KEY_VALUE) {
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// key_value in [2, end-start]
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expert_tokens_count_or_cumsum = at::empty({expert_num, 2}, x.options().dtype(at::kLong));
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}
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at::Tensor expanded_scale = at::empty({expanded_scale_len}, x.options().dtype(at::kFloat));
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return {expanded_x, expanded_row_idx, expert_tokens_count_or_cumsum, expanded_scale};
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}
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std::tuple<at::Tensor,at::Tensor, at::Tensor> moe_gating_top_k_meta(
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const at::Tensor& x,
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int64_t k,
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int64_t k_group,
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int64_t group_count,
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int64_t group_select_mode,
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int64_t renorm,
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int64_t norm_type,
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bool out_flag,
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double routed_scaling_factor,
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double eps,
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const c10::optional<at::Tensor>& bias_opt
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)
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{
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TORCH_CHECK(x.dim() == 2, "The x should be 2D");
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TORCH_CHECK(
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x.scalar_type() == at::kHalf || x.scalar_type() == at::kFloat || x.scalar_type() == at::kBFloat16,
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"float16、float32 or bfloat16 tensor expected but got a tensor with dtype: ",
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x.scalar_type());
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auto x_size = x.sizes();
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auto rows = x_size[0];
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auto expert_num = x_size[1];
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const at::Tensor &bias = c10::value_or_else(bias_opt, [] { return at::Tensor(); });
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if (bias.defined()) {
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TORCH_CHECK(x.scalar_type() == bias.scalar_type(), "The dtype of x and bias should be same");
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TORCH_CHECK(bias.dim() == 1, "The bias should be 1D");
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auto bias_size = bias.sizes();
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|
TORCH_CHECK(bias_size[0] == expert_num, "The bias first dim should be same as x second dim");
|
|
}
|
|
at::Tensor y = at::empty({rows, k}, x.options());
|
|
at::Tensor expert_idx = at::empty({rows, k}, x.options().dtype(at::kInt));
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|
at::Tensor out = at::empty({rows, expert_num}, x.options().dtype(at::kFloat));
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|
|
|
return std::tuple<at::Tensor, at::Tensor, at::Tensor>(y,expert_idx,out);
|
|
}
|
|
} // namespace meta
|
|
} // namespace vllm_ascend
|
|
|
|
namespace {
|
|
// Register the meta implementations of the custom kernels for symbolic tracing, this will also
|
|
// the custom kernel been captured into aclgraph
|
|
TORCH_LIBRARY_IMPL_EXPAND(CONCAT(_C, _ascend), Meta, ops) {
|
|
|
|
// Rotary embedding meta implementation
|
|
ops.impl("rotary_embedding", &vllm_ascend::meta::rotary_embedding_meta);
|
|
// Masked input and mask meta implementation
|
|
ops.impl("get_masked_input_and_mask", &vllm_ascend::meta::get_masked_input_and_mask_meta);
|
|
// Bgmv expand
|
|
ops.impl("bgmv_expand", &vllm_ascend::meta::bgmv_expand_meta);
|
|
// Sgmv expand
|
|
ops.impl("sgmv_expand", &vllm_ascend::meta::sgmv_expand_meta);
|
|
// MLA preprocess
|
|
ops.impl("mla_preprocess", &vllm_ascend::meta::mla_preprocess);
|
|
// grouped_matmul_swiglu_quant meta implementation
|
|
ops.impl("grouped_matmul_swiglu_quant", &vllm_ascend::meta::grouped_matmul_swiglu_quant);
|
|
// Grouped matmul swiglu quant weight nz tensor list
|
|
ops.impl("grouped_matmul_swiglu_quant_weight_nz_tensor_list", &vllm_ascend::meta::grouped_matmul_swiglu_quant_weight_nz_tensor_list_meta);
|
|
// dispatch_gmm_combine_decode meta implementation
|
|
ops.impl("dispatch_gmm_combine_decode", &vllm_ascend::meta::dispatch_gmm_combine_decode_meta);
|
|
// batch_matmul_transpose
|
|
ops.impl("batch_matmul_transpose", &vllm_ascend::meta::batch_matmul_transpose);
|
|
// Lightning indexer
|
|
ops.impl("npu_lightning_indexer", &vllm_ascend::meta::npu_lightning_indexer_meta);
|
|
// Sparse flash attention
|
|
ops.impl("npu_sparse_flash_attention", &vllm_ascend::meta::npu_sparse_flash_attention_meta);
|
|
// MoE dispatch-ffn-combine
|
|
ops.impl("dispatch_ffn_combine", &vllm_ascend::meta::dispatch_ffn_combine_meta);
|
|
// matmul allreduce add rmsnorm
|
|
ops.impl("matmul_allreduce_add_rmsnorm", &vllm_ascend::meta::matmul_allreduce_add_rmsnorm_meta);
|
|
// moe_init_routing_custom
|
|
ops.impl("npu_moe_init_routing_custom", &vllm_ascend::meta::npu_moe_init_routing_custom_meta);
|
|
// Moe_gating_top_k
|
|
ops.impl("moe_gating_top_k", &vllm_ascend::meta::moe_gating_top_k_meta);
|
|
}
|
|
}
|