[UT] fix skip ut test and enable ut test run normally (#3410)

### What this PR does / why we need it?

fix skip ut test and enable ut test run normally

### Does this PR introduce _any_ user-facing change?

### How was this patch tested?


- vLLM version: v0.11.0rc3
- vLLM main: https://github.com/vllm-project/vllm/commit/v0.11.0

Signed-off-by: hfadzxy <starmoon_zhang@163.com>

tests/ut/core/test_scheduler.py

@@ -169,7 +169,8 @@ class TestAscendScheduler(TestBase):
             kv_cache_groups=[
                 KVCacheGroupSpec(['layer'],
                                  FullAttentionSpec(block_size, 1, 1,
-                                                   torch.float32, False))
+                                                   torch.float32, False,
+                                                   False))
             ],
         )
         cache_config.num_gpu_blocks = 10000