[CI] Fix UT (#2452)

Make UT CI happy 

- vLLM version: v0.10.0
- vLLM main:
d983769c41

---------

Signed-off-by: wangxiyuan <wangxiyuan1007@gmail.com>
Signed-off-by: MengqingCao <cmq0113@163.com>
Co-authored-by: MengqingCao <cmq0113@163.com>
This commit is contained in:
wangxiyuan
2025-08-20 16:26:07 +08:00
committed by GitHub
parent 3f867ee708
commit eccfb715f6
5 changed files with 30 additions and 27 deletions

View File

@@ -51,7 +51,7 @@ class TestTorchairUtils(TestBase):
mock_model_registry.return_value = mock_registry
utils.register_torchair_model()
self.assertEqual(mock_model_registry.register_model.call_count, 3)
self.assertEqual(mock_model_registry.register_model.call_count, 5)
call_args_list = mock_model_registry.register_model.call_args_list
expected_registrations = [
@@ -63,7 +63,11 @@ class TestTorchairUtils(TestBase):
),
("DeepseekV3ForCausalLM",
"vllm_ascend.torchair.models.torchair_deepseek_v3:TorchairDeepseekV3ForCausalLM"
)
),
("Qwen2ForCausalLM",
"vllm_ascend.torchair.models.qwen2:CustomQwen2ForCausalLM"),
("Qwen3ForCausalLM",
"vllm_ascend.torchair.models.qwen3_moe:CustomQwen3MoeForCausalLM")
]
for i, (expected_name,