[refact] unified soc_version code (#4359)
### What this PR does / why we need it?
Currently, there are two paths to judge the chip type in code,
`get_ascend_soc_version` use `get_soc_version` api in torch_npu, and
`is_310p` `use _build_info.__soc_version__`, which generate when
install. We need to unify the two paths.
We need to unify these codes based on the following points:
1. We need to ensure consistency in chip type judgment between compiling
and running states;
2. In compiling state, we need chip type to complete op's compilation,
but in running state, we only need device
type(910B/910_93/310P/910_95/etc) to make code branch judgement;
3. In compiling state, torch_npu may not have been installed yet, so we
can't use torch_npu's api.
Based on the above points, we have made the following changes:
1. When user set env `SOC_VERSION`, use it; when not set, query
soc_version by `npu-smi`;
2. generate device_type based on soc_version when compiling, and write
`__device_type__` instead of `__soc_version__` in `_build_info.py`;
3. In running state, use `__device_type__` to judge code branch.
### Does this PR introduce _any_ user-facing change?
When not set env `SOC_VERSION`, it will not be `ASCEND910B1` by default,
we will query soc_version by `npu-smi`. And env `SOC_VERSION` must be in
the list `soc_to_device` in `setup.py`.
- vLLM version: v0.11.0
- vLLM main:
2918c1b49c
Signed-off-by: zzzzwwjj <1183291235@qq.com>
This commit is contained in:
@@ -43,9 +43,9 @@ from vllm_ascend.quantization.w4a8_dynamic import \
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AscendW4A8DynamicFusedMoEMethod
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from vllm_ascend.quantization.w8a8_dynamic import \
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AscendW8A8DynamicFusedMoEMethod
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from vllm_ascend.utils import (ACL_FORMAT_FRACTAL_NZ, enable_sp, is_310p,
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is_enable_nz, npu_stream_switch,
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shared_expert_dp_enabled,
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from vllm_ascend.utils import (ACL_FORMAT_FRACTAL_NZ, AscendDeviceType,
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enable_sp, get_ascend_device_type, is_enable_nz,
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npu_stream_switch, shared_expert_dp_enabled,
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shared_experts_calculation_stream)
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@@ -79,7 +79,8 @@ class AscendUnquantizedFusedMoEMethod(UnquantizedFusedMoEMethod):
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w2_data = self._maybe_pad_weight(layer.w2_weight.data)
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layer.w2_weight = torch.nn.Parameter(w2_data, requires_grad=False)
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if not is_310p() and is_enable_nz():
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if get_ascend_device_type() != AscendDeviceType._310P and is_enable_nz(
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):
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layer.w13_weight.data = torch_npu.npu_format_cast(
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layer.w13_weight.data, ACL_FORMAT_FRACTAL_NZ)
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layer.w2_weight.data = torch_npu.npu_format_cast(
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@@ -22,7 +22,8 @@ from torch.nn.functional import pad
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from vllm.forward_context import get_forward_context
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from vllm_ascend.ascend_forward_context import MoECommType
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from vllm_ascend.utils import dispose_tensor, is_310p
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from vllm_ascend.utils import (AscendDeviceType, dispose_tensor,
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get_ascend_device_type)
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def cumsum_group_list(group_list: torch.Tensor,
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@@ -210,7 +211,7 @@ def unquant_apply_mlp(hidden_states: torch.Tensor,
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group_type=0,
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group_list=group_list,
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)[0]
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if is_310p():
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if get_ascend_device_type() == AscendDeviceType._310P:
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gate_up_out = torch_npu.npu_swiglu(gate_up_out.to(torch.float32)).to(
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torch.float16)
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else:
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@@ -30,7 +30,7 @@ from vllm.distributed.parallel_state import get_ep_group
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from vllm_ascend.distributed.parallel_state import get_mc2_group
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from vllm_ascend.ops.fused_moe.comm_utils import (
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async_all_to_all, gather_from_sequence_parallel_region)
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from vllm_ascend.utils import (AscendSocVersion, get_ascend_soc_version,
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from vllm_ascend.utils import (AscendDeviceType, get_ascend_device_type,
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is_hierarchical_communication_enabled)
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@@ -98,11 +98,11 @@ class TokenDispatcherWithMC2(MoETokenDispatcher):
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self.enable_dispatch_v2 = hasattr(torch_npu,
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"npu_moe_distribute_dispatch_v2")
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self.need_extra_args = (
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get_ascend_soc_version() == AscendSocVersion.A3)
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get_ascend_device_type() == AscendDeviceType._910_93)
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# NOTE: Currently, when in A3, we need to pass in some extra param into dispatch & combine
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self.a3_need_extra_args = \
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get_ascend_soc_version() == AscendSocVersion.A3
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get_ascend_device_type() == AscendDeviceType._910_93
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# NOTE: When in A2, setting the environment variables HCCL_INTRA_PCIE_ENABLE=1 and
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# HCCL_INTRA_ROCE_ENABLE=0 can reduce cross-machine communication traffic and significantly
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# improve communication performance.
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