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xc-llm-ascend/vllm_ascend/lora/utils.py

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import vllm
[feat]: oproj tensor parallelism in pure DP and graph-mode scenarios. (#2167) ### What this PR does / why we need it? This PR introduces Oproj matrix tensor model parallel to achieve decreasing of memory consumption. It only support graph mode in pure DP scenario. In deepseek r1 w8a8 PD disagregated Decode instance, using pure DP, with oproj_tensor_parallel_size = 8, we have 1 ms TPOT increasing, saved 5.8 GB NPU memory per RANK. We got best performance when oproj_tensor_parallel_size=4 without TPOT increasing. performance data: <img width="1442" height="442" alt="image" src="https://github.com/user-attachments/assets/83270fc5-868a-4387-b0a9-fac29b4a376d" /> ### Does this PR introduce _any_ user-facing change? This PR introduces one new config in `additional_config`. | Name | Effect | Required | Type | Constraints | | :---------------------------- | :--------------------------------------- | :------- | :--- | :----------------- | | oproj_tensor_parallel_size | Split the o_proj matrix along the row dimension (head num * head dim) into oproj_tensor_parallel_size pieces. | No | int | default value is None, once this value is set, the feature will be enabled, head num * head dim must be divisible by this value. | example `--additional_config={"oproj_tensor_parallel_size": 8}` ### How was this patch tested? - vLLM version: v0.10.1.1 - vLLM main: https://github.com/vllm-project/vllm/commit/eddaafc1c77b0690194cbd1b73747d572793838c --------- Signed-off-by: zzhx1 <zzh_201018@outlook.com> Co-authored-by: zzh <zzh_201018@outlook.com>
2025-09-07 10:31:32 +08:00
from torch import nn
from transformers import PretrainedConfig
from vllm.config import LoRAConfig
[Lint]Style: Convert `vllm-ascend/` to ruff format(Batch #5) (#5996) ### What this PR does / why we need it? **Scope of Changes**: | File Path | | :--- | | `.../distributed/kv_transfer/kv_pool/ascend_store/ascend_store_connector.py` | | `vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/backend/backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/memcache_backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/mooncake_backend.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/config_data.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/kv_transfer.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_scheduler.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_worker.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_kv_cache_manager.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_offload_connector.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/cpu_offload/metadata.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ucm_connector.py` | | ` vllm_ascend/distributed/kv_transfer/utils/mooncake_transfer_engine.py` | | ` vllm_ascend/distributed/kv_transfer/utils/utils.py` | | ` vllm_ascend/kv_offload/cpu_npu.py` | | ` vllm_ascend/kv_offload/npu.py` | | ` vllm_ascend/lora/lora_ops.py` | | ` vllm_ascend/lora/punica_npu.py` | | ` vllm_ascend/lora/utils.py` | ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: v0.13.0 - vLLM main: https://github.com/vllm-project/vllm/commit/2c24bc6996cb165fce92f780b388a5e39b3f4060 --------- Signed-off-by: MrZ20 <2609716663@qq.com> Signed-off-by: SILONG ZENG <2609716663@qq.com>
2026-01-24 22:45:38 +08:00
from vllm.lora.layers import (
ColumnParallelLinearWithLoRA,
ColumnParallelLinearWithShardedLoRA,
[Lint]Style: Convert `vllm-ascend/` to ruff format(Batch #5) (#5996) ### What this PR does / why we need it? **Scope of Changes**: | File Path | | :--- | | `.../distributed/kv_transfer/kv_pool/ascend_store/ascend_store_connector.py` | | `vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/backend/backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/memcache_backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/mooncake_backend.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/config_data.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/kv_transfer.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_scheduler.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_worker.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_kv_cache_manager.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_offload_connector.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/cpu_offload/metadata.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ucm_connector.py` | | ` vllm_ascend/distributed/kv_transfer/utils/mooncake_transfer_engine.py` | | ` vllm_ascend/distributed/kv_transfer/utils/utils.py` | | ` vllm_ascend/kv_offload/cpu_npu.py` | | ` vllm_ascend/kv_offload/npu.py` | | ` vllm_ascend/lora/lora_ops.py` | | ` vllm_ascend/lora/punica_npu.py` | | ` vllm_ascend/lora/utils.py` | ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: v0.13.0 - vLLM main: https://github.com/vllm-project/vllm/commit/2c24bc6996cb165fce92f780b388a5e39b3f4060 --------- Signed-off-by: MrZ20 <2609716663@qq.com> Signed-off-by: SILONG ZENG <2609716663@qq.com>
2026-01-24 22:45:38 +08:00
MergedColumnParallelLinearWithLoRA,
MergedColumnParallelLinearWithShardedLoRA,
[Lint]Style: Convert `vllm-ascend/` to ruff format(Batch #5) (#5996) ### What this PR does / why we need it? **Scope of Changes**: | File Path | | :--- | | `.../distributed/kv_transfer/kv_pool/ascend_store/ascend_store_connector.py` | | `vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/backend/backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/memcache_backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/mooncake_backend.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/config_data.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/kv_transfer.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_scheduler.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_worker.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_kv_cache_manager.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_offload_connector.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/cpu_offload/metadata.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ucm_connector.py` | | ` vllm_ascend/distributed/kv_transfer/utils/mooncake_transfer_engine.py` | | ` vllm_ascend/distributed/kv_transfer/utils/utils.py` | | ` vllm_ascend/kv_offload/cpu_npu.py` | | ` vllm_ascend/kv_offload/npu.py` | | ` vllm_ascend/lora/lora_ops.py` | | ` vllm_ascend/lora/punica_npu.py` | | ` vllm_ascend/lora/utils.py` | ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: v0.13.0 - vLLM main: https://github.com/vllm-project/vllm/commit/2c24bc6996cb165fce92f780b388a5e39b3f4060 --------- Signed-off-by: MrZ20 <2609716663@qq.com> Signed-off-by: SILONG ZENG <2609716663@qq.com>
2026-01-24 22:45:38 +08:00
MergedQKVParallelLinearWithLoRA,
MergedQKVParallelLinearWithShardedLoRA,
[Lint]Style: Convert `vllm-ascend/` to ruff format(Batch #5) (#5996) ### What this PR does / why we need it? **Scope of Changes**: | File Path | | :--- | | `.../distributed/kv_transfer/kv_pool/ascend_store/ascend_store_connector.py` | | `vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/backend/backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/memcache_backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/mooncake_backend.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/config_data.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/kv_transfer.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_scheduler.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_worker.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_kv_cache_manager.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_offload_connector.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/cpu_offload/metadata.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ucm_connector.py` | | ` vllm_ascend/distributed/kv_transfer/utils/mooncake_transfer_engine.py` | | ` vllm_ascend/distributed/kv_transfer/utils/utils.py` | | ` vllm_ascend/kv_offload/cpu_npu.py` | | ` vllm_ascend/kv_offload/npu.py` | | ` vllm_ascend/lora/lora_ops.py` | | ` vllm_ascend/lora/punica_npu.py` | | ` vllm_ascend/lora/utils.py` | ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: v0.13.0 - vLLM main: https://github.com/vllm-project/vllm/commit/2c24bc6996cb165fce92f780b388a5e39b3f4060 --------- Signed-off-by: MrZ20 <2609716663@qq.com> Signed-off-by: SILONG ZENG <2609716663@qq.com>
2026-01-24 22:45:38 +08:00
QKVParallelLinearWithLoRA,
QKVParallelLinearWithShardedLoRA,
[Lint]Style: Convert `vllm-ascend/` to ruff format(Batch #5) (#5996) ### What this PR does / why we need it? **Scope of Changes**: | File Path | | :--- | | `.../distributed/kv_transfer/kv_pool/ascend_store/ascend_store_connector.py` | | `vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/backend/backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/memcache_backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/mooncake_backend.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/config_data.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/kv_transfer.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_scheduler.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_worker.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_kv_cache_manager.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_offload_connector.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/cpu_offload/metadata.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ucm_connector.py` | | ` vllm_ascend/distributed/kv_transfer/utils/mooncake_transfer_engine.py` | | ` vllm_ascend/distributed/kv_transfer/utils/utils.py` | | ` vllm_ascend/kv_offload/cpu_npu.py` | | ` vllm_ascend/kv_offload/npu.py` | | ` vllm_ascend/lora/lora_ops.py` | | ` vllm_ascend/lora/punica_npu.py` | | ` vllm_ascend/lora/utils.py` | ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: v0.13.0 - vLLM main: https://github.com/vllm-project/vllm/commit/2c24bc6996cb165fce92f780b388a5e39b3f4060 --------- Signed-off-by: MrZ20 <2609716663@qq.com> Signed-off-by: SILONG ZENG <2609716663@qq.com>
2026-01-24 22:45:38 +08:00
RowParallelLinearWithLoRA,
RowParallelLinearWithShardedLoRA,
[Lint]Style: Convert `vllm-ascend/` to ruff format(Batch #5) (#5996) ### What this PR does / why we need it? **Scope of Changes**: | File Path | | :--- | | `.../distributed/kv_transfer/kv_pool/ascend_store/ascend_store_connector.py` | | `vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/backend/backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/memcache_backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/mooncake_backend.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/config_data.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/kv_transfer.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_scheduler.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_worker.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_kv_cache_manager.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_offload_connector.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/cpu_offload/metadata.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ucm_connector.py` | | ` vllm_ascend/distributed/kv_transfer/utils/mooncake_transfer_engine.py` | | ` vllm_ascend/distributed/kv_transfer/utils/utils.py` | | ` vllm_ascend/kv_offload/cpu_npu.py` | | ` vllm_ascend/kv_offload/npu.py` | | ` vllm_ascend/lora/lora_ops.py` | | ` vllm_ascend/lora/punica_npu.py` | | ` vllm_ascend/lora/utils.py` | ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: v0.13.0 - vLLM main: https://github.com/vllm-project/vllm/commit/2c24bc6996cb165fce92f780b388a5e39b3f4060 --------- Signed-off-by: MrZ20 <2609716663@qq.com> Signed-off-by: SILONG ZENG <2609716663@qq.com>
2026-01-24 22:45:38 +08:00
VocabParallelEmbeddingWithLoRA,
)
from vllm.lora.layers.replicated_linear import ReplicatedLinearWithLoRA
from vllm.lora.layers.utils import _fully_sharded_can_replace, _not_fully_sharded_can_replace
[feat]: oproj tensor parallelism in pure DP and graph-mode scenarios. (#2167) ### What this PR does / why we need it? This PR introduces Oproj matrix tensor model parallel to achieve decreasing of memory consumption. It only support graph mode in pure DP scenario. In deepseek r1 w8a8 PD disagregated Decode instance, using pure DP, with oproj_tensor_parallel_size = 8, we have 1 ms TPOT increasing, saved 5.8 GB NPU memory per RANK. We got best performance when oproj_tensor_parallel_size=4 without TPOT increasing. performance data: <img width="1442" height="442" alt="image" src="https://github.com/user-attachments/assets/83270fc5-868a-4387-b0a9-fac29b4a376d" /> ### Does this PR introduce _any_ user-facing change? This PR introduces one new config in `additional_config`. | Name | Effect | Required | Type | Constraints | | :---------------------------- | :--------------------------------------- | :------- | :--- | :----------------- | | oproj_tensor_parallel_size | Split the o_proj matrix along the row dimension (head num * head dim) into oproj_tensor_parallel_size pieces. | No | int | default value is None, once this value is set, the feature will be enabled, head num * head dim must be divisible by this value. | example `--additional_config={"oproj_tensor_parallel_size": 8}` ### How was this patch tested? - vLLM version: v0.10.1.1 - vLLM main: https://github.com/vllm-project/vllm/commit/eddaafc1c77b0690194cbd1b73747d572793838c --------- Signed-off-by: zzhx1 <zzh_201018@outlook.com> Co-authored-by: zzh <zzh_201018@outlook.com>
2025-09-07 10:31:32 +08:00
[Lint]Style: Convert `vllm-ascend/` to ruff format(Batch #5) (#5996) ### What this PR does / why we need it? **Scope of Changes**: | File Path | | :--- | | `.../distributed/kv_transfer/kv_pool/ascend_store/ascend_store_connector.py` | | `vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/backend/backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/memcache_backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/mooncake_backend.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/config_data.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/kv_transfer.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_scheduler.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_worker.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_kv_cache_manager.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_offload_connector.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/cpu_offload/metadata.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ucm_connector.py` | | ` vllm_ascend/distributed/kv_transfer/utils/mooncake_transfer_engine.py` | | ` vllm_ascend/distributed/kv_transfer/utils/utils.py` | | ` vllm_ascend/kv_offload/cpu_npu.py` | | ` vllm_ascend/kv_offload/npu.py` | | ` vllm_ascend/lora/lora_ops.py` | | ` vllm_ascend/lora/punica_npu.py` | | ` vllm_ascend/lora/utils.py` | ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: v0.13.0 - vLLM main: https://github.com/vllm-project/vllm/commit/2c24bc6996cb165fce92f780b388a5e39b3f4060 --------- Signed-off-by: MrZ20 <2609716663@qq.com> Signed-off-by: SILONG ZENG <2609716663@qq.com>
2026-01-24 22:45:38 +08:00
from vllm_ascend.ops.linear import (
AscendColumnParallelLinear,
AscendMergedColumnParallelLinear,
AscendQKVParallelLinear,
AscendReplicatedLinear,
[Lint]Style: Convert `vllm-ascend/` to ruff format(Batch #5) (#5996) ### What this PR does / why we need it? **Scope of Changes**: | File Path | | :--- | | `.../distributed/kv_transfer/kv_pool/ascend_store/ascend_store_connector.py` | | `vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/backend/backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/memcache_backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/mooncake_backend.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/config_data.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/kv_transfer.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_scheduler.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_worker.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_kv_cache_manager.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_offload_connector.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/cpu_offload/metadata.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ucm_connector.py` | | ` vllm_ascend/distributed/kv_transfer/utils/mooncake_transfer_engine.py` | | ` vllm_ascend/distributed/kv_transfer/utils/utils.py` | | ` vllm_ascend/kv_offload/cpu_npu.py` | | ` vllm_ascend/kv_offload/npu.py` | | ` vllm_ascend/lora/lora_ops.py` | | ` vllm_ascend/lora/punica_npu.py` | | ` vllm_ascend/lora/utils.py` | ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: v0.13.0 - vLLM main: https://github.com/vllm-project/vllm/commit/2c24bc6996cb165fce92f780b388a5e39b3f4060 --------- Signed-off-by: MrZ20 <2609716663@qq.com> Signed-off-by: SILONG ZENG <2609716663@qq.com>
2026-01-24 22:45:38 +08:00
AscendRowParallelLinear,
)
from vllm_ascend.ops.vocab_parallel_embedding import AscendVocabParallelEmbedding
[feat]: oproj tensor parallelism in pure DP and graph-mode scenarios. (#2167) ### What this PR does / why we need it? This PR introduces Oproj matrix tensor model parallel to achieve decreasing of memory consumption. It only support graph mode in pure DP scenario. In deepseek r1 w8a8 PD disagregated Decode instance, using pure DP, with oproj_tensor_parallel_size = 8, we have 1 ms TPOT increasing, saved 5.8 GB NPU memory per RANK. We got best performance when oproj_tensor_parallel_size=4 without TPOT increasing. performance data: <img width="1442" height="442" alt="image" src="https://github.com/user-attachments/assets/83270fc5-868a-4387-b0a9-fac29b4a376d" /> ### Does this PR introduce _any_ user-facing change? This PR introduces one new config in `additional_config`. | Name | Effect | Required | Type | Constraints | | :---------------------------- | :--------------------------------------- | :------- | :--- | :----------------- | | oproj_tensor_parallel_size | Split the o_proj matrix along the row dimension (head num * head dim) into oproj_tensor_parallel_size pieces. | No | int | default value is None, once this value is set, the feature will be enabled, head num * head dim must be divisible by this value. | example `--additional_config={"oproj_tensor_parallel_size": 8}` ### How was this patch tested? - vLLM version: v0.10.1.1 - vLLM main: https://github.com/vllm-project/vllm/commit/eddaafc1c77b0690194cbd1b73747d572793838c --------- Signed-off-by: zzhx1 <zzh_201018@outlook.com> Co-authored-by: zzh <zzh_201018@outlook.com>
2025-09-07 10:31:32 +08:00
class AscendColumnParallelLinearWithLoRA(ColumnParallelLinearWithLoRA):
[feat]: oproj tensor parallelism in pure DP and graph-mode scenarios. (#2167) ### What this PR does / why we need it? This PR introduces Oproj matrix tensor model parallel to achieve decreasing of memory consumption. It only support graph mode in pure DP scenario. In deepseek r1 w8a8 PD disagregated Decode instance, using pure DP, with oproj_tensor_parallel_size = 8, we have 1 ms TPOT increasing, saved 5.8 GB NPU memory per RANK. We got best performance when oproj_tensor_parallel_size=4 without TPOT increasing. performance data: <img width="1442" height="442" alt="image" src="https://github.com/user-attachments/assets/83270fc5-868a-4387-b0a9-fac29b4a376d" /> ### Does this PR introduce _any_ user-facing change? This PR introduces one new config in `additional_config`. | Name | Effect | Required | Type | Constraints | | :---------------------------- | :--------------------------------------- | :------- | :--- | :----------------- | | oproj_tensor_parallel_size | Split the o_proj matrix along the row dimension (head num * head dim) into oproj_tensor_parallel_size pieces. | No | int | default value is None, once this value is set, the feature will be enabled, head num * head dim must be divisible by this value. | example `--additional_config={"oproj_tensor_parallel_size": 8}` ### How was this patch tested? - vLLM version: v0.10.1.1 - vLLM main: https://github.com/vllm-project/vllm/commit/eddaafc1c77b0690194cbd1b73747d572793838c --------- Signed-off-by: zzhx1 <zzh_201018@outlook.com> Co-authored-by: zzh <zzh_201018@outlook.com>
2025-09-07 10:31:32 +08:00
@classmethod
@_not_fully_sharded_can_replace
[feat]: oproj tensor parallelism in pure DP and graph-mode scenarios. (#2167) ### What this PR does / why we need it? This PR introduces Oproj matrix tensor model parallel to achieve decreasing of memory consumption. It only support graph mode in pure DP scenario. In deepseek r1 w8a8 PD disagregated Decode instance, using pure DP, with oproj_tensor_parallel_size = 8, we have 1 ms TPOT increasing, saved 5.8 GB NPU memory per RANK. We got best performance when oproj_tensor_parallel_size=4 without TPOT increasing. performance data: <img width="1442" height="442" alt="image" src="https://github.com/user-attachments/assets/83270fc5-868a-4387-b0a9-fac29b4a376d" /> ### Does this PR introduce _any_ user-facing change? This PR introduces one new config in `additional_config`. | Name | Effect | Required | Type | Constraints | | :---------------------------- | :--------------------------------------- | :------- | :--- | :----------------- | | oproj_tensor_parallel_size | Split the o_proj matrix along the row dimension (head num * head dim) into oproj_tensor_parallel_size pieces. | No | int | default value is None, once this value is set, the feature will be enabled, head num * head dim must be divisible by this value. | example `--additional_config={"oproj_tensor_parallel_size": 8}` ### How was this patch tested? - vLLM version: v0.10.1.1 - vLLM main: https://github.com/vllm-project/vllm/commit/eddaafc1c77b0690194cbd1b73747d572793838c --------- Signed-off-by: zzhx1 <zzh_201018@outlook.com> Co-authored-by: zzh <zzh_201018@outlook.com>
2025-09-07 10:31:32 +08:00
def can_replace_layer(
cls,
source_layer: nn.Module,
lora_config: LoRAConfig,
packed_modules_list: list,
[Lint]Style: Convert `vllm-ascend/` to ruff format(Batch #5) (#5996) ### What this PR does / why we need it? **Scope of Changes**: | File Path | | :--- | | `.../distributed/kv_transfer/kv_pool/ascend_store/ascend_store_connector.py` | | `vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/backend/backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/memcache_backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/mooncake_backend.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/config_data.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/kv_transfer.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_scheduler.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_worker.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_kv_cache_manager.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_offload_connector.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/cpu_offload/metadata.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ucm_connector.py` | | ` vllm_ascend/distributed/kv_transfer/utils/mooncake_transfer_engine.py` | | ` vllm_ascend/distributed/kv_transfer/utils/utils.py` | | ` vllm_ascend/kv_offload/cpu_npu.py` | | ` vllm_ascend/kv_offload/npu.py` | | ` vllm_ascend/lora/lora_ops.py` | | ` vllm_ascend/lora/punica_npu.py` | | ` vllm_ascend/lora/utils.py` | ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: v0.13.0 - vLLM main: https://github.com/vllm-project/vllm/commit/2c24bc6996cb165fce92f780b388a5e39b3f4060 --------- Signed-off-by: MrZ20 <2609716663@qq.com> Signed-off-by: SILONG ZENG <2609716663@qq.com>
2026-01-24 22:45:38 +08:00
model_config: PretrainedConfig | None,
[feat]: oproj tensor parallelism in pure DP and graph-mode scenarios. (#2167) ### What this PR does / why we need it? This PR introduces Oproj matrix tensor model parallel to achieve decreasing of memory consumption. It only support graph mode in pure DP scenario. In deepseek r1 w8a8 PD disagregated Decode instance, using pure DP, with oproj_tensor_parallel_size = 8, we have 1 ms TPOT increasing, saved 5.8 GB NPU memory per RANK. We got best performance when oproj_tensor_parallel_size=4 without TPOT increasing. performance data: <img width="1442" height="442" alt="image" src="https://github.com/user-attachments/assets/83270fc5-868a-4387-b0a9-fac29b4a376d" /> ### Does this PR introduce _any_ user-facing change? This PR introduces one new config in `additional_config`. | Name | Effect | Required | Type | Constraints | | :---------------------------- | :--------------------------------------- | :------- | :--- | :----------------- | | oproj_tensor_parallel_size | Split the o_proj matrix along the row dimension (head num * head dim) into oproj_tensor_parallel_size pieces. | No | int | default value is None, once this value is set, the feature will be enabled, head num * head dim must be divisible by this value. | example `--additional_config={"oproj_tensor_parallel_size": 8}` ### How was this patch tested? - vLLM version: v0.10.1.1 - vLLM main: https://github.com/vllm-project/vllm/commit/eddaafc1c77b0690194cbd1b73747d572793838c --------- Signed-off-by: zzhx1 <zzh_201018@outlook.com> Co-authored-by: zzh <zzh_201018@outlook.com>
2025-09-07 10:31:32 +08:00
) -> bool:
return type(source_layer) is AscendColumnParallelLinear
[feat]: oproj tensor parallelism in pure DP and graph-mode scenarios. (#2167) ### What this PR does / why we need it? This PR introduces Oproj matrix tensor model parallel to achieve decreasing of memory consumption. It only support graph mode in pure DP scenario. In deepseek r1 w8a8 PD disagregated Decode instance, using pure DP, with oproj_tensor_parallel_size = 8, we have 1 ms TPOT increasing, saved 5.8 GB NPU memory per RANK. We got best performance when oproj_tensor_parallel_size=4 without TPOT increasing. performance data: <img width="1442" height="442" alt="image" src="https://github.com/user-attachments/assets/83270fc5-868a-4387-b0a9-fac29b4a376d" /> ### Does this PR introduce _any_ user-facing change? This PR introduces one new config in `additional_config`. | Name | Effect | Required | Type | Constraints | | :---------------------------- | :--------------------------------------- | :------- | :--- | :----------------- | | oproj_tensor_parallel_size | Split the o_proj matrix along the row dimension (head num * head dim) into oproj_tensor_parallel_size pieces. | No | int | default value is None, once this value is set, the feature will be enabled, head num * head dim must be divisible by this value. | example `--additional_config={"oproj_tensor_parallel_size": 8}` ### How was this patch tested? - vLLM version: v0.10.1.1 - vLLM main: https://github.com/vllm-project/vllm/commit/eddaafc1c77b0690194cbd1b73747d572793838c --------- Signed-off-by: zzhx1 <zzh_201018@outlook.com> Co-authored-by: zzh <zzh_201018@outlook.com>
2025-09-07 10:31:32 +08:00
[Lint]Style: Convert `vllm-ascend/` to ruff format(Batch #5) (#5996) ### What this PR does / why we need it? **Scope of Changes**: | File Path | | :--- | | `.../distributed/kv_transfer/kv_pool/ascend_store/ascend_store_connector.py` | | `vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/backend/backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/memcache_backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/mooncake_backend.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/config_data.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/kv_transfer.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_scheduler.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_worker.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_kv_cache_manager.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_offload_connector.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/cpu_offload/metadata.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ucm_connector.py` | | ` vllm_ascend/distributed/kv_transfer/utils/mooncake_transfer_engine.py` | | ` vllm_ascend/distributed/kv_transfer/utils/utils.py` | | ` vllm_ascend/kv_offload/cpu_npu.py` | | ` vllm_ascend/kv_offload/npu.py` | | ` vllm_ascend/lora/lora_ops.py` | | ` vllm_ascend/lora/punica_npu.py` | | ` vllm_ascend/lora/utils.py` | ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: v0.13.0 - vLLM main: https://github.com/vllm-project/vllm/commit/2c24bc6996cb165fce92f780b388a5e39b3f4060 --------- Signed-off-by: MrZ20 <2609716663@qq.com> Signed-off-by: SILONG ZENG <2609716663@qq.com>
2026-01-24 22:45:38 +08:00
class AscendMergedColumnParallelLinearWithLoRA(MergedColumnParallelLinearWithLoRA):
[feat]: oproj tensor parallelism in pure DP and graph-mode scenarios. (#2167) ### What this PR does / why we need it? This PR introduces Oproj matrix tensor model parallel to achieve decreasing of memory consumption. It only support graph mode in pure DP scenario. In deepseek r1 w8a8 PD disagregated Decode instance, using pure DP, with oproj_tensor_parallel_size = 8, we have 1 ms TPOT increasing, saved 5.8 GB NPU memory per RANK. We got best performance when oproj_tensor_parallel_size=4 without TPOT increasing. performance data: <img width="1442" height="442" alt="image" src="https://github.com/user-attachments/assets/83270fc5-868a-4387-b0a9-fac29b4a376d" /> ### Does this PR introduce _any_ user-facing change? This PR introduces one new config in `additional_config`. | Name | Effect | Required | Type | Constraints | | :---------------------------- | :--------------------------------------- | :------- | :--- | :----------------- | | oproj_tensor_parallel_size | Split the o_proj matrix along the row dimension (head num * head dim) into oproj_tensor_parallel_size pieces. | No | int | default value is None, once this value is set, the feature will be enabled, head num * head dim must be divisible by this value. | example `--additional_config={"oproj_tensor_parallel_size": 8}` ### How was this patch tested? - vLLM version: v0.10.1.1 - vLLM main: https://github.com/vllm-project/vllm/commit/eddaafc1c77b0690194cbd1b73747d572793838c --------- Signed-off-by: zzhx1 <zzh_201018@outlook.com> Co-authored-by: zzh <zzh_201018@outlook.com>
2025-09-07 10:31:32 +08:00
@classmethod
@_not_fully_sharded_can_replace
[feat]: oproj tensor parallelism in pure DP and graph-mode scenarios. (#2167) ### What this PR does / why we need it? This PR introduces Oproj matrix tensor model parallel to achieve decreasing of memory consumption. It only support graph mode in pure DP scenario. In deepseek r1 w8a8 PD disagregated Decode instance, using pure DP, with oproj_tensor_parallel_size = 8, we have 1 ms TPOT increasing, saved 5.8 GB NPU memory per RANK. We got best performance when oproj_tensor_parallel_size=4 without TPOT increasing. performance data: <img width="1442" height="442" alt="image" src="https://github.com/user-attachments/assets/83270fc5-868a-4387-b0a9-fac29b4a376d" /> ### Does this PR introduce _any_ user-facing change? This PR introduces one new config in `additional_config`. | Name | Effect | Required | Type | Constraints | | :---------------------------- | :--------------------------------------- | :------- | :--- | :----------------- | | oproj_tensor_parallel_size | Split the o_proj matrix along the row dimension (head num * head dim) into oproj_tensor_parallel_size pieces. | No | int | default value is None, once this value is set, the feature will be enabled, head num * head dim must be divisible by this value. | example `--additional_config={"oproj_tensor_parallel_size": 8}` ### How was this patch tested? - vLLM version: v0.10.1.1 - vLLM main: https://github.com/vllm-project/vllm/commit/eddaafc1c77b0690194cbd1b73747d572793838c --------- Signed-off-by: zzhx1 <zzh_201018@outlook.com> Co-authored-by: zzh <zzh_201018@outlook.com>
2025-09-07 10:31:32 +08:00
def can_replace_layer(
cls,
source_layer: nn.Module,
lora_config: LoRAConfig,
packed_modules_list: list,
[Lint]Style: Convert `vllm-ascend/` to ruff format(Batch #5) (#5996) ### What this PR does / why we need it? **Scope of Changes**: | File Path | | :--- | | `.../distributed/kv_transfer/kv_pool/ascend_store/ascend_store_connector.py` | | `vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/backend/backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/memcache_backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/mooncake_backend.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/config_data.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/kv_transfer.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_scheduler.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_worker.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_kv_cache_manager.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_offload_connector.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/cpu_offload/metadata.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ucm_connector.py` | | ` vllm_ascend/distributed/kv_transfer/utils/mooncake_transfer_engine.py` | | ` vllm_ascend/distributed/kv_transfer/utils/utils.py` | | ` vllm_ascend/kv_offload/cpu_npu.py` | | ` vllm_ascend/kv_offload/npu.py` | | ` vllm_ascend/lora/lora_ops.py` | | ` vllm_ascend/lora/punica_npu.py` | | ` vllm_ascend/lora/utils.py` | ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: v0.13.0 - vLLM main: https://github.com/vllm-project/vllm/commit/2c24bc6996cb165fce92f780b388a5e39b3f4060 --------- Signed-off-by: MrZ20 <2609716663@qq.com> Signed-off-by: SILONG ZENG <2609716663@qq.com>
2026-01-24 22:45:38 +08:00
model_config: PretrainedConfig | None,
[feat]: oproj tensor parallelism in pure DP and graph-mode scenarios. (#2167) ### What this PR does / why we need it? This PR introduces Oproj matrix tensor model parallel to achieve decreasing of memory consumption. It only support graph mode in pure DP scenario. In deepseek r1 w8a8 PD disagregated Decode instance, using pure DP, with oproj_tensor_parallel_size = 8, we have 1 ms TPOT increasing, saved 5.8 GB NPU memory per RANK. We got best performance when oproj_tensor_parallel_size=4 without TPOT increasing. performance data: <img width="1442" height="442" alt="image" src="https://github.com/user-attachments/assets/83270fc5-868a-4387-b0a9-fac29b4a376d" /> ### Does this PR introduce _any_ user-facing change? This PR introduces one new config in `additional_config`. | Name | Effect | Required | Type | Constraints | | :---------------------------- | :--------------------------------------- | :------- | :--- | :----------------- | | oproj_tensor_parallel_size | Split the o_proj matrix along the row dimension (head num * head dim) into oproj_tensor_parallel_size pieces. | No | int | default value is None, once this value is set, the feature will be enabled, head num * head dim must be divisible by this value. | example `--additional_config={"oproj_tensor_parallel_size": 8}` ### How was this patch tested? - vLLM version: v0.10.1.1 - vLLM main: https://github.com/vllm-project/vllm/commit/eddaafc1c77b0690194cbd1b73747d572793838c --------- Signed-off-by: zzhx1 <zzh_201018@outlook.com> Co-authored-by: zzh <zzh_201018@outlook.com>
2025-09-07 10:31:32 +08:00
) -> bool:
return type(source_layer) is AscendMergedColumnParallelLinear
[feat]: oproj tensor parallelism in pure DP and graph-mode scenarios. (#2167) ### What this PR does / why we need it? This PR introduces Oproj matrix tensor model parallel to achieve decreasing of memory consumption. It only support graph mode in pure DP scenario. In deepseek r1 w8a8 PD disagregated Decode instance, using pure DP, with oproj_tensor_parallel_size = 8, we have 1 ms TPOT increasing, saved 5.8 GB NPU memory per RANK. We got best performance when oproj_tensor_parallel_size=4 without TPOT increasing. performance data: <img width="1442" height="442" alt="image" src="https://github.com/user-attachments/assets/83270fc5-868a-4387-b0a9-fac29b4a376d" /> ### Does this PR introduce _any_ user-facing change? This PR introduces one new config in `additional_config`. | Name | Effect | Required | Type | Constraints | | :---------------------------- | :--------------------------------------- | :------- | :--- | :----------------- | | oproj_tensor_parallel_size | Split the o_proj matrix along the row dimension (head num * head dim) into oproj_tensor_parallel_size pieces. | No | int | default value is None, once this value is set, the feature will be enabled, head num * head dim must be divisible by this value. | example `--additional_config={"oproj_tensor_parallel_size": 8}` ### How was this patch tested? - vLLM version: v0.10.1.1 - vLLM main: https://github.com/vllm-project/vllm/commit/eddaafc1c77b0690194cbd1b73747d572793838c --------- Signed-off-by: zzhx1 <zzh_201018@outlook.com> Co-authored-by: zzh <zzh_201018@outlook.com>
2025-09-07 10:31:32 +08:00
class AscendRowParallelLinearWithLoRA(RowParallelLinearWithLoRA):
[feat]: oproj tensor parallelism in pure DP and graph-mode scenarios. (#2167) ### What this PR does / why we need it? This PR introduces Oproj matrix tensor model parallel to achieve decreasing of memory consumption. It only support graph mode in pure DP scenario. In deepseek r1 w8a8 PD disagregated Decode instance, using pure DP, with oproj_tensor_parallel_size = 8, we have 1 ms TPOT increasing, saved 5.8 GB NPU memory per RANK. We got best performance when oproj_tensor_parallel_size=4 without TPOT increasing. performance data: <img width="1442" height="442" alt="image" src="https://github.com/user-attachments/assets/83270fc5-868a-4387-b0a9-fac29b4a376d" /> ### Does this PR introduce _any_ user-facing change? This PR introduces one new config in `additional_config`. | Name | Effect | Required | Type | Constraints | | :---------------------------- | :--------------------------------------- | :------- | :--- | :----------------- | | oproj_tensor_parallel_size | Split the o_proj matrix along the row dimension (head num * head dim) into oproj_tensor_parallel_size pieces. | No | int | default value is None, once this value is set, the feature will be enabled, head num * head dim must be divisible by this value. | example `--additional_config={"oproj_tensor_parallel_size": 8}` ### How was this patch tested? - vLLM version: v0.10.1.1 - vLLM main: https://github.com/vllm-project/vllm/commit/eddaafc1c77b0690194cbd1b73747d572793838c --------- Signed-off-by: zzhx1 <zzh_201018@outlook.com> Co-authored-by: zzh <zzh_201018@outlook.com>
2025-09-07 10:31:32 +08:00
@classmethod
@_not_fully_sharded_can_replace
[feat]: oproj tensor parallelism in pure DP and graph-mode scenarios. (#2167) ### What this PR does / why we need it? This PR introduces Oproj matrix tensor model parallel to achieve decreasing of memory consumption. It only support graph mode in pure DP scenario. In deepseek r1 w8a8 PD disagregated Decode instance, using pure DP, with oproj_tensor_parallel_size = 8, we have 1 ms TPOT increasing, saved 5.8 GB NPU memory per RANK. We got best performance when oproj_tensor_parallel_size=4 without TPOT increasing. performance data: <img width="1442" height="442" alt="image" src="https://github.com/user-attachments/assets/83270fc5-868a-4387-b0a9-fac29b4a376d" /> ### Does this PR introduce _any_ user-facing change? This PR introduces one new config in `additional_config`. | Name | Effect | Required | Type | Constraints | | :---------------------------- | :--------------------------------------- | :------- | :--- | :----------------- | | oproj_tensor_parallel_size | Split the o_proj matrix along the row dimension (head num * head dim) into oproj_tensor_parallel_size pieces. | No | int | default value is None, once this value is set, the feature will be enabled, head num * head dim must be divisible by this value. | example `--additional_config={"oproj_tensor_parallel_size": 8}` ### How was this patch tested? - vLLM version: v0.10.1.1 - vLLM main: https://github.com/vllm-project/vllm/commit/eddaafc1c77b0690194cbd1b73747d572793838c --------- Signed-off-by: zzhx1 <zzh_201018@outlook.com> Co-authored-by: zzh <zzh_201018@outlook.com>
2025-09-07 10:31:32 +08:00
def can_replace_layer(
cls,
source_layer: nn.Module,
lora_config: LoRAConfig,
packed_modules_list: list,
[Lint]Style: Convert `vllm-ascend/` to ruff format(Batch #5) (#5996) ### What this PR does / why we need it? **Scope of Changes**: | File Path | | :--- | | `.../distributed/kv_transfer/kv_pool/ascend_store/ascend_store_connector.py` | | `vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/backend/backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/memcache_backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/mooncake_backend.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/config_data.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/kv_transfer.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_scheduler.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_worker.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_kv_cache_manager.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_offload_connector.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/cpu_offload/metadata.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ucm_connector.py` | | ` vllm_ascend/distributed/kv_transfer/utils/mooncake_transfer_engine.py` | | ` vllm_ascend/distributed/kv_transfer/utils/utils.py` | | ` vllm_ascend/kv_offload/cpu_npu.py` | | ` vllm_ascend/kv_offload/npu.py` | | ` vllm_ascend/lora/lora_ops.py` | | ` vllm_ascend/lora/punica_npu.py` | | ` vllm_ascend/lora/utils.py` | ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: v0.13.0 - vLLM main: https://github.com/vllm-project/vllm/commit/2c24bc6996cb165fce92f780b388a5e39b3f4060 --------- Signed-off-by: MrZ20 <2609716663@qq.com> Signed-off-by: SILONG ZENG <2609716663@qq.com>
2026-01-24 22:45:38 +08:00
model_config: PretrainedConfig | None,
[feat]: oproj tensor parallelism in pure DP and graph-mode scenarios. (#2167) ### What this PR does / why we need it? This PR introduces Oproj matrix tensor model parallel to achieve decreasing of memory consumption. It only support graph mode in pure DP scenario. In deepseek r1 w8a8 PD disagregated Decode instance, using pure DP, with oproj_tensor_parallel_size = 8, we have 1 ms TPOT increasing, saved 5.8 GB NPU memory per RANK. We got best performance when oproj_tensor_parallel_size=4 without TPOT increasing. performance data: <img width="1442" height="442" alt="image" src="https://github.com/user-attachments/assets/83270fc5-868a-4387-b0a9-fac29b4a376d" /> ### Does this PR introduce _any_ user-facing change? This PR introduces one new config in `additional_config`. | Name | Effect | Required | Type | Constraints | | :---------------------------- | :--------------------------------------- | :------- | :--- | :----------------- | | oproj_tensor_parallel_size | Split the o_proj matrix along the row dimension (head num * head dim) into oproj_tensor_parallel_size pieces. | No | int | default value is None, once this value is set, the feature will be enabled, head num * head dim must be divisible by this value. | example `--additional_config={"oproj_tensor_parallel_size": 8}` ### How was this patch tested? - vLLM version: v0.10.1.1 - vLLM main: https://github.com/vllm-project/vllm/commit/eddaafc1c77b0690194cbd1b73747d572793838c --------- Signed-off-by: zzhx1 <zzh_201018@outlook.com> Co-authored-by: zzh <zzh_201018@outlook.com>
2025-09-07 10:31:32 +08:00
) -> bool:
return type(source_layer) is AscendRowParallelLinear
class AscendVocabParallelEmbeddingWithLoRA(VocabParallelEmbeddingWithLoRA):
@classmethod
def can_replace_layer(
cls,
source_layer: nn.Module,
lora_config: LoRAConfig,
packed_modules_list: list,
[Lint]Style: Convert `vllm-ascend/` to ruff format(Batch #5) (#5996) ### What this PR does / why we need it? **Scope of Changes**: | File Path | | :--- | | `.../distributed/kv_transfer/kv_pool/ascend_store/ascend_store_connector.py` | | `vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/backend/backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/memcache_backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/mooncake_backend.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/config_data.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/kv_transfer.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_scheduler.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_worker.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_kv_cache_manager.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_offload_connector.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/cpu_offload/metadata.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ucm_connector.py` | | ` vllm_ascend/distributed/kv_transfer/utils/mooncake_transfer_engine.py` | | ` vllm_ascend/distributed/kv_transfer/utils/utils.py` | | ` vllm_ascend/kv_offload/cpu_npu.py` | | ` vllm_ascend/kv_offload/npu.py` | | ` vllm_ascend/lora/lora_ops.py` | | ` vllm_ascend/lora/punica_npu.py` | | ` vllm_ascend/lora/utils.py` | ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: v0.13.0 - vLLM main: https://github.com/vllm-project/vllm/commit/2c24bc6996cb165fce92f780b388a5e39b3f4060 --------- Signed-off-by: MrZ20 <2609716663@qq.com> Signed-off-by: SILONG ZENG <2609716663@qq.com>
2026-01-24 22:45:38 +08:00
model_config: PretrainedConfig | None,
) -> bool:
return type(source_layer) is AscendVocabParallelEmbedding
class AscendQKVParallelLinearWithLoRA(QKVParallelLinearWithLoRA):
@classmethod
@_not_fully_sharded_can_replace
[Lint]Style: Convert `vllm-ascend/` to ruff format(Batch #5) (#5996) ### What this PR does / why we need it? **Scope of Changes**: | File Path | | :--- | | `.../distributed/kv_transfer/kv_pool/ascend_store/ascend_store_connector.py` | | `vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/backend/backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/memcache_backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/mooncake_backend.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/config_data.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/kv_transfer.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_scheduler.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_worker.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_kv_cache_manager.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_offload_connector.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/cpu_offload/metadata.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ucm_connector.py` | | ` vllm_ascend/distributed/kv_transfer/utils/mooncake_transfer_engine.py` | | ` vllm_ascend/distributed/kv_transfer/utils/utils.py` | | ` vllm_ascend/kv_offload/cpu_npu.py` | | ` vllm_ascend/kv_offload/npu.py` | | ` vllm_ascend/lora/lora_ops.py` | | ` vllm_ascend/lora/punica_npu.py` | | ` vllm_ascend/lora/utils.py` | ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: v0.13.0 - vLLM main: https://github.com/vllm-project/vllm/commit/2c24bc6996cb165fce92f780b388a5e39b3f4060 --------- Signed-off-by: MrZ20 <2609716663@qq.com> Signed-off-by: SILONG ZENG <2609716663@qq.com>
2026-01-24 22:45:38 +08:00
def can_replace_layer(
cls,
source_layer: nn.Module,
lora_config: LoRAConfig,
packed_modules_list: list,
model_config: PretrainedConfig | None,
) -> bool:
return type(source_layer) is AscendQKVParallelLinear and len(packed_modules_list) == 1
class AscendMergedQKVParallelLinearWithLoRA(MergedQKVParallelLinearWithLoRA):
@classmethod
@_not_fully_sharded_can_replace
def can_replace_layer(
cls,
source_layer: nn.Module,
lora_config: LoRAConfig,
packed_modules_list: list,
[Lint]Style: Convert `vllm-ascend/` to ruff format(Batch #5) (#5996) ### What this PR does / why we need it? **Scope of Changes**: | File Path | | :--- | | `.../distributed/kv_transfer/kv_pool/ascend_store/ascend_store_connector.py` | | `vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/backend/backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/memcache_backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/mooncake_backend.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/config_data.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/kv_transfer.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_scheduler.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_worker.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_kv_cache_manager.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_offload_connector.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/cpu_offload/metadata.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ucm_connector.py` | | ` vllm_ascend/distributed/kv_transfer/utils/mooncake_transfer_engine.py` | | ` vllm_ascend/distributed/kv_transfer/utils/utils.py` | | ` vllm_ascend/kv_offload/cpu_npu.py` | | ` vllm_ascend/kv_offload/npu.py` | | ` vllm_ascend/lora/lora_ops.py` | | ` vllm_ascend/lora/punica_npu.py` | | ` vllm_ascend/lora/utils.py` | ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: v0.13.0 - vLLM main: https://github.com/vllm-project/vllm/commit/2c24bc6996cb165fce92f780b388a5e39b3f4060 --------- Signed-off-by: MrZ20 <2609716663@qq.com> Signed-off-by: SILONG ZENG <2609716663@qq.com>
2026-01-24 22:45:38 +08:00
model_config: PretrainedConfig | None,
) -> bool:
[Lint]Style: Convert `vllm-ascend/` to ruff format(Batch #5) (#5996) ### What this PR does / why we need it? **Scope of Changes**: | File Path | | :--- | | `.../distributed/kv_transfer/kv_pool/ascend_store/ascend_store_connector.py` | | `vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/backend/backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/memcache_backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/mooncake_backend.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/config_data.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/kv_transfer.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_scheduler.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_worker.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_kv_cache_manager.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_offload_connector.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/cpu_offload/metadata.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ucm_connector.py` | | ` vllm_ascend/distributed/kv_transfer/utils/mooncake_transfer_engine.py` | | ` vllm_ascend/distributed/kv_transfer/utils/utils.py` | | ` vllm_ascend/kv_offload/cpu_npu.py` | | ` vllm_ascend/kv_offload/npu.py` | | ` vllm_ascend/lora/lora_ops.py` | | ` vllm_ascend/lora/punica_npu.py` | | ` vllm_ascend/lora/utils.py` | ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: v0.13.0 - vLLM main: https://github.com/vllm-project/vllm/commit/2c24bc6996cb165fce92f780b388a5e39b3f4060 --------- Signed-off-by: MrZ20 <2609716663@qq.com> Signed-off-by: SILONG ZENG <2609716663@qq.com>
2026-01-24 22:45:38 +08:00
return type(source_layer) is AscendQKVParallelLinear and len(packed_modules_list) == 3
class AscendReplicatedLinearWithLoRA(ReplicatedLinearWithLoRA):
# ReplicatedLinear should always be replaced, regardless of the fully
# sharded LoRAs setting, because it is, by definition, copied per GPU.
@classmethod
def can_replace_layer(
cls,
source_layer: nn.Module,
lora_config: LoRAConfig,
packed_modules_list: list,
model_config: PretrainedConfig | None = None,
) -> bool:
return type(source_layer) is AscendReplicatedLinear
class AscendColumnParallelLinearWithShardedLoRA(ColumnParallelLinearWithShardedLoRA):
@classmethod
@_fully_sharded_can_replace
def can_replace_layer(
cls,
source_layer: nn.Module,
lora_config: LoRAConfig,
packed_modules_list: list,
model_config: PretrainedConfig | None = None,
) -> bool:
return type(source_layer) is AscendColumnParallelLinear
class AscendMergedColumnParallelLinearWithShardedLoRA(MergedColumnParallelLinearWithShardedLoRA):
@classmethod
@_fully_sharded_can_replace
def can_replace_layer(
cls,
source_layer: nn.Module,
lora_config: LoRAConfig,
packed_modules_list: list,
model_config: PretrainedConfig | None = None,
) -> bool:
return type(source_layer) is AscendMergedColumnParallelLinear
class AscendMergedQKVParallelLinearWithShardedLoRA(MergedQKVParallelLinearWithShardedLoRA):
@classmethod
@_fully_sharded_can_replace
def can_replace_layer(
cls,
source_layer: nn.Module,
lora_config: LoRAConfig,
packed_modules_list: list,
model_config: PretrainedConfig | None = None,
) -> bool:
return type(source_layer) is AscendQKVParallelLinear and len(packed_modules_list) == 3
class AscendQKVParallelLinearWithShardedLoRA(QKVParallelLinearWithShardedLoRA):
@classmethod
@_fully_sharded_can_replace
def can_replace_layer(
cls,
source_layer: nn.Module,
lora_config: LoRAConfig,
packed_modules_list: list,
model_config: PretrainedConfig | None = None,
) -> bool:
return type(source_layer) is AscendQKVParallelLinear and len(packed_modules_list) == 1
class AscendRowParallelLinearWithShardedLoRA(RowParallelLinearWithShardedLoRA):
@classmethod
@_fully_sharded_can_replace
def can_replace_layer(
cls,
source_layer: nn.Module,
lora_config: LoRAConfig,
packed_modules_list: list,
model_config: PretrainedConfig | None = None,
) -> bool:
return type(source_layer) is AscendRowParallelLinear
def refresh_all_lora_classes():
vllm.lora.utils._all_lora_classes.add(AscendColumnParallelLinearWithLoRA)
[Lint]Style: Convert `vllm-ascend/` to ruff format(Batch #5) (#5996) ### What this PR does / why we need it? **Scope of Changes**: | File Path | | :--- | | `.../distributed/kv_transfer/kv_pool/ascend_store/ascend_store_connector.py` | | `vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/backend/backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/memcache_backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/mooncake_backend.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/config_data.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/kv_transfer.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_scheduler.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_worker.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_kv_cache_manager.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_offload_connector.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/cpu_offload/metadata.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ucm_connector.py` | | ` vllm_ascend/distributed/kv_transfer/utils/mooncake_transfer_engine.py` | | ` vllm_ascend/distributed/kv_transfer/utils/utils.py` | | ` vllm_ascend/kv_offload/cpu_npu.py` | | ` vllm_ascend/kv_offload/npu.py` | | ` vllm_ascend/lora/lora_ops.py` | | ` vllm_ascend/lora/punica_npu.py` | | ` vllm_ascend/lora/utils.py` | ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: v0.13.0 - vLLM main: https://github.com/vllm-project/vllm/commit/2c24bc6996cb165fce92f780b388a5e39b3f4060 --------- Signed-off-by: MrZ20 <2609716663@qq.com> Signed-off-by: SILONG ZENG <2609716663@qq.com>
2026-01-24 22:45:38 +08:00
vllm.lora.utils._all_lora_classes.add(AscendMergedColumnParallelLinearWithLoRA)
vllm.lora.utils._all_lora_classes.add(AscendRowParallelLinearWithLoRA)
vllm.lora.utils._all_lora_classes.add(AscendVocabParallelEmbeddingWithLoRA)
vllm.lora.utils._all_lora_classes.add(AscendQKVParallelLinearWithLoRA)
[Lint]Style: Convert `vllm-ascend/` to ruff format(Batch #5) (#5996) ### What this PR does / why we need it? **Scope of Changes**: | File Path | | :--- | | `.../distributed/kv_transfer/kv_pool/ascend_store/ascend_store_connector.py` | | `vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/backend/backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/memcache_backend.py` | | ` .../distributed/kv_transfer/kv_pool/ascend_store/backend/mooncake_backend.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/config_data.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/kv_transfer.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_scheduler.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/pool_worker.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_kv_cache_manager.py` | | ` .../distributed/kv_transfer/kv_pool/cpu_offload/cpu_offload_connector.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/cpu_offload/metadata.py` | | ` vllm_ascend/distributed/kv_transfer/kv_pool/ucm_connector.py` | | ` vllm_ascend/distributed/kv_transfer/utils/mooncake_transfer_engine.py` | | ` vllm_ascend/distributed/kv_transfer/utils/utils.py` | | ` vllm_ascend/kv_offload/cpu_npu.py` | | ` vllm_ascend/kv_offload/npu.py` | | ` vllm_ascend/lora/lora_ops.py` | | ` vllm_ascend/lora/punica_npu.py` | | ` vllm_ascend/lora/utils.py` | ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: v0.13.0 - vLLM main: https://github.com/vllm-project/vllm/commit/2c24bc6996cb165fce92f780b388a5e39b3f4060 --------- Signed-off-by: MrZ20 <2609716663@qq.com> Signed-off-by: SILONG ZENG <2609716663@qq.com>
2026-01-24 22:45:38 +08:00
vllm.lora.utils._all_lora_classes.add(AscendMergedQKVParallelLinearWithLoRA)
vllm.lora.utils._all_lora_classes.add(AscendColumnParallelLinearWithShardedLoRA)
vllm.lora.utils._all_lora_classes.add(AscendMergedColumnParallelLinearWithShardedLoRA)
vllm.lora.utils._all_lora_classes.add(AscendMergedQKVParallelLinearWithShardedLoRA)
vllm.lora.utils._all_lora_classes.add(AscendQKVParallelLinearWithShardedLoRA)
vllm.lora.utils._all_lora_classes.add(AscendRowParallelLinearWithShardedLoRA)
vllm.lora.utils._all_lora_classes.add(AscendReplicatedLinearWithLoRA)