Yineng Zhang
|
e0b9a423c8
|
chore: bump v0.4.3 (#3556)
|
2025-02-14 09:43:14 +08:00 |
|
Yineng Zhang
|
70f894b810
|
feat: support flashinfer mla attention for deepseek v3 (#3550)
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2025-02-14 08:50:14 +08:00 |
|
Wen-Heng (Jack) Chung
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871a4aa1bf
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[ROCm] Add ROCm tuning configs for AMD Instinct MI325X. (#3536)
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2025-02-12 20:09:36 -08:00 |
|
yizhang2077
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98eecbda54
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integrate blockwise fp8 kernel (#3529)
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2025-02-13 04:39:33 +08:00 |
|
Liangsheng Yin
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8616357a97
|
Fix deepseek awq v3 (#3450)
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2025-02-12 22:09:52 +08:00 |
|
Xiaoyu Zhang
|
45e3a7bc41
|
use sgl_per_token_group_quant_fp8 kernel (#3493)
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2025-02-12 18:40:42 +08:00 |
|
Ata Fatahi
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b8318aec48
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Make NCCL NVLS configurable (#3502)
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2025-02-12 03:25:06 +08:00 |
|
HAI
|
d81ac4434e
|
MI30x: More graph captures for larger batch sizes and concurrencies (#3420)
|
2025-02-12 03:04:38 +08:00 |
|
Ke Bao
|
7e6d5fc694
|
Support Eagle cuda graph for Triton backend (#3500)
|
2025-02-12 02:27:45 +08:00 |
|
Wen-Heng (Jack) Chung
|
cadd5dbe6a
|
Tune MI300X fused MoE Triton kernel JSON config. (#3492)
|
2025-02-11 10:27:25 -08:00 |
|
yigex
|
fdf04a1426
|
[ROCm] Add ROCm tuning config to block gemm and Re-tune for AMD Radeon Graphics (#3418)
Co-authored-by: Bruce Xue <yigex@xilinx.com>
Co-authored-by: HAI <hixiao@gmail.com>
|
2025-02-10 23:55:04 -08:00 |
|
Jackmin801
|
5f0e7de339
|
[Feat] Return hidden states (experimental) (#3364)
Co-authored-by: Chayenne <zhaochen20@outlook.com>
|
2025-02-10 15:54:37 -08:00 |
|
Xiaoyu Zhang
|
2f47d710ae
|
refine some typo (#3473)
|
2025-02-10 23:35:44 +08:00 |
|
Ying Sheng
|
d23cb9a01e
|
[Eagle] reduce one draft forward (#3468)
|
2025-02-10 20:21:49 +08:00 |
|
Ke Bao
|
2d61132374
|
Support Eagle2 for Triton backend (#3466)
|
2025-02-10 20:00:42 +08:00 |
|
Yineng Zhang
|
cddb1cdf8f
|
chore: bump v0.4.2.post4 (#3459)
|
2025-02-10 14:12:16 +08:00 |
|
Baizhou Zhang
|
c45cab1c00
|
[Fix] Fix accuracy bug and refactor codes for lora (#3413)
|
2025-02-10 13:29:00 +08:00 |
|
Yineng Zhang
|
27c4c9cf52
|
remove _grouped_size_compiled_for_decode_kernels (#3453)
|
2025-02-10 13:01:21 +08:00 |
|
Yineng Zhang
|
36f6fc5093
|
feat: enable ragged fa3 by default on hopper 12.4+ (#3442)
|
2025-02-10 07:43:01 +08:00 |
|
Yineng Zhang
|
4cfd3add6d
|
support version in sgl-kernel (#3439)
|
2025-02-10 03:49:52 +08:00 |
|
Yineng Zhang
|
85986bb978
|
compatible with new outlines (#3435)
|
2025-02-10 01:51:30 +08:00 |
|
Yineng Zhang
|
64c8713573
|
remove activation dependency in fused_moe (#3433)
|
2025-02-10 01:18:57 +08:00 |
|
Yineng Zhang
|
1646149a83
|
fix draft cuda graph capture failure (#3431)
|
2025-02-09 23:16:20 +08:00 |
|
Yineng Zhang
|
bc72e5bd32
|
add cuda graph capture failure possible solution (#3430)
|
2025-02-09 22:57:11 +08:00 |
|
Yineng Zhang
|
014cab4dd2
|
update forward_return_lse (#3425)
|
2025-02-09 20:18:44 +08:00 |
|
Ying Sheng
|
7b4e61fff3
|
[Fix] Fix eagle with disable cuda graph (#3411)
|
2025-02-09 08:40:00 +08:00 |
|
Yineng Zhang
|
fad315cb8e
|
fix EAGLE 2 non greedy case (#3407)
Co-authored-by: Ying Sheng <sqy1415@gmail.com>
|
2025-02-09 07:28:34 +08:00 |
|
lukec
|
4530136e61
|
Add H20 fp8 w8a8 gemm config (#3386)
|
2025-02-08 15:36:31 +08:00 |
|
Yineng Zhang
|
c1f5f99f60
|
chore: bump v0.4.2.post3 (#3369)
|
2025-02-07 08:20:03 -08:00 |
|
Yineng Zhang
|
fa82dfccdd
|
fix EagleVerifyInput (#3378)
|
2025-02-07 22:30:43 +08:00 |
|
Yineng Zhang
|
f287037673
|
update sgl-kernel version (#3374)
|
2025-02-07 20:51:06 +08:00 |
|
Yineng Zhang
|
f9905d59a8
|
support speculative decoding kernel in sgl-kernel (#3373)
Co-authored-by: Ying Sheng <sqy1415@gmail.com>
|
2025-02-07 20:29:51 +08:00 |
|
lizamd
|
e868d0b60e
|
update waves_per_eu to 1 (#3356)
|
2025-02-07 13:08:06 +08:00 |
|
Shi Shuai
|
591e751e07
|
Fix: Runtime error for function calling (#3300)
|
2025-02-06 20:52:01 -08:00 |
|
Chayenne
|
40022d075a
|
Feature: Fix the binding error in Llama (#3355)
|
2025-02-06 20:19:24 -08:00 |
|
Xiaoyu Zhang
|
cdae77b03d
|
optimize moe_align_kernel cuda (#3347)
|
2025-02-07 00:53:46 +08:00 |
|
Wen-Heng (Jack) Chung
|
32de54ed1a
|
[ROCm] Fix fp8 unrolledx4 matmul kernel. (#3325)
Co-authored-by: HAI <hixiao@gmail.com>
|
2025-02-05 18:44:15 -08:00 |
|
Ke Bao
|
a322051e31
|
Support custom mask for Triton attention (#3317)
|
2025-02-06 01:16:02 +08:00 |
|
Ke Bao
|
de5533341e
|
Update Triton extend backend interface (#3309)
|
2025-02-05 18:12:22 +08:00 |
|
Yineng Zhang
|
7aad8d1854
|
chore: bump v0.4.2.post2 (#3313)
|
2025-02-05 17:35:02 +08:00 |
|
Baizhou Zhang
|
76fa2d152c
|
Fix lora flashinfer import bug on ROCM (#3312)
|
2025-02-05 16:36:49 +08:00 |
|
Wen-Heng (Jack) Chung
|
7ab84948d8
|
[ROCm] Logic to decide whether to used manually unrolled kernel. (#3306)
|
2025-02-04 19:12:20 -08:00 |
|
kk
|
4885b90802
|
Use forward_cuda to execute custom op for hip platform (#3305)
Co-authored-by: wunhuang <wunhuang@amd.com>
|
2025-02-05 02:58:17 +00:00 |
|
Wen-Heng (Jack) Chung
|
c2723a42a5
|
[ROCm] Manually unroll _w8a8_block_fp8_matmul kernel on AMD GPU. (#3299)
|
2025-02-05 07:15:40 +08:00 |
|
Wen-Heng (Jack) Chung
|
c7256ca836
|
[ROCm] Add tuning configs for AMD Radeon Graphics. (#3294)
|
2025-02-04 10:34:57 -08:00 |
|
Ke Bao
|
a07364ccc5
|
Update Triton decode backend interface (#3292)
|
2025-02-04 23:26:04 +08:00 |
|
HAI
|
2c1a695ff1
|
ROCm: sgl-kernel enablement starting with sgl_moe_align_block (#3287)
|
2025-02-04 21:44:44 +08:00 |
|
Yineng Zhang
|
d39899e85c
|
upgrade flashinfer v0.2.0.post2 (#3288)
Co-authored-by: pankajroark <pankajroark@users.noreply.github.com>
|
2025-02-04 21:41:40 +08:00 |
|
Baizhou Zhang
|
70817a7eae
|
[Feature] Define backends and add Triton backend for Lora (#3161)
Co-authored-by: Ying Sheng <sqy1415@gmail.com>
|
2025-02-03 22:09:13 -08:00 |
|
kushanam
|
d54cee1441
|
adding Triton configs for DeepSeekV3 on Blackwell (#3272)
|
2025-02-04 04:12:09 +08:00 |
|