[sgl-kernel] Optimize concat_mla_k kernel (#10543)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com> Co-authored-by: PGFLMG <1106310035@qq.com>
This commit is contained in:
@@ -3,6 +3,7 @@
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#include <cuda_runtime.h>
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#include "pytorch_extension_utils.h"
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#include "utils.cuh"
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constexpr int NUM_LOCAL_HEADS = 128;
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constexpr int QK_NOPE_HEAD_DIM = 128;
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@@ -12,20 +13,10 @@ constexpr int K_HEAD_DIM = QK_NOPE_HEAD_DIM + QK_ROPE_HEAD_DIM;
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constexpr int HEAD_CHUNK_SIZE = 16;
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constexpr int NUM_HEAD_CHUNKS = NUM_LOCAL_HEADS / HEAD_CHUNK_SIZE;
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__forceinline__ __device__ int get_lane_id() {
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int lane_id;
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asm("mov.s32 %0, %laneid;" : "=r"(lane_id));
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return lane_id;
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}
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int ceil_div(int a, int b) {
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return (a + b - 1) / b;
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}
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__global__ void concat_mla_k_kernel(
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nv_bfloat16* k,
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nv_bfloat16* k_nope,
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nv_bfloat16* k_rope,
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nv_bfloat16* __restrict__ k,
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const nv_bfloat16* __restrict__ k_nope,
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const nv_bfloat16* __restrict__ k_rope,
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const int num_tokens,
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const int k_stride_0,
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const int k_stride_1,
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@@ -36,43 +27,50 @@ __global__ void concat_mla_k_kernel(
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const int token_id = flat_warp_id / NUM_HEAD_CHUNKS;
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const int head_chunk_id = flat_warp_id % NUM_HEAD_CHUNKS;
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const int lane_id = get_lane_id();
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if (token_id >= num_tokens) return;
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if (token_id >= num_tokens) {
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return;
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}
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using NopeVec = int2; // 8B/thread,32 thread = 256B/row
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using RopeVec = int; // 4B/thread,32 thread = 128B/row
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static_assert(sizeof(NopeVec) * 32 == QK_NOPE_HEAD_DIM * sizeof(nv_bfloat16), "nope vec mismatch");
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static_assert(sizeof(RopeVec) * 32 == QK_ROPE_HEAD_DIM * sizeof(nv_bfloat16), "rope vec mismatch");
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using KNopeBufType = int2;
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static_assert(sizeof(KNopeBufType) == QK_NOPE_HEAD_DIM * sizeof(k[0]) / 32);
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KNopeBufType k_nope_buf[HEAD_CHUNK_SIZE];
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const int head_row0 = head_chunk_id * HEAD_CHUNK_SIZE;
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using KRopeBufType = int;
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static_assert(sizeof(KRopeBufType) == QK_ROPE_HEAD_DIM * sizeof(k[0]) / 32);
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KRopeBufType k_rope_buf;
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const int2* __restrict__ nope_src =
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reinterpret_cast<const int2*>(k_nope + token_id * k_nope_stride_0 + head_row0 * k_nope_stride_1) + lane_id;
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{
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const int* base_addr = reinterpret_cast<int*>(k_rope + token_id * k_rope_stride_0);
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k_rope_buf = *(base_addr + lane_id);
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}
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int2* __restrict__ nope_dst = reinterpret_cast<int2*>(k + token_id * k_stride_0 + head_row0 * k_stride_1) + lane_id;
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int* __restrict__ rope_dst =
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reinterpret_cast<int*>(k + token_id * k_stride_0 + head_row0 * k_stride_1 + QK_NOPE_HEAD_DIM) + lane_id;
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const int nope_src_stride_v = (k_nope_stride_1 >> 2); // int2 covers 4 bf16
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const int nope_dst_stride_v = (k_stride_1 >> 2);
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const int rope_dst_stride_v = (k_stride_1 >> 1); // int covers 2 bf16
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const int* rope_base = reinterpret_cast<const int*>(k_rope + token_id * k_rope_stride_0);
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const RopeVec rope_val = ld_na_global_v1(rope_base + lane_id);
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prefetch_L2(nope_src);
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NopeVec cur = ld_na_global_v2(nope_src);
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#pragma unroll
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for (int i = 0; i < HEAD_CHUNK_SIZE; ++i) {
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const int head_id = head_chunk_id * HEAD_CHUNK_SIZE + i;
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const int2* base_addr = reinterpret_cast<int2*>(k_nope + token_id * k_nope_stride_0 + head_id * k_nope_stride_1);
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k_nope_buf[i] = *(base_addr + lane_id);
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}
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#pragma unroll
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for (int i = 0; i < HEAD_CHUNK_SIZE; ++i) {
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const int head_id = head_chunk_id * HEAD_CHUNK_SIZE + i;
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{
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int2* base_addr = reinterpret_cast<int2*>(k + token_id * k_stride_0 + head_id * k_stride_1);
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*(base_addr + lane_id) = k_nope_buf[i];
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}
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{
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int* base_addr = reinterpret_cast<int*>(k + token_id * k_stride_0 + head_id * k_stride_1 + QK_NOPE_HEAD_DIM);
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*(base_addr + lane_id) = k_rope_buf;
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NopeVec next;
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if (i + 1 < HEAD_CHUNK_SIZE) {
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const int2* next_src = nope_src + nope_src_stride_v;
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prefetch_L2(next_src);
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next = ld_na_global_v2(next_src);
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}
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st_na_global_v2(nope_dst, cur);
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st_na_global_v1(rope_dst, rope_val);
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nope_src += nope_src_stride_v;
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nope_dst += nope_dst_stride_v;
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rope_dst += rope_dst_stride_v;
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cur = next;
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}
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}
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72
sgl-kernel/csrc/elementwise/utils.cuh
Normal file
72
sgl-kernel/csrc/elementwise/utils.cuh
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@@ -0,0 +1,72 @@
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// Adapted from https://github.com/deepseek-ai/DeepEP/blob/main/csrc/kernels/utils.cuh
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#pragma once
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#include <cuda_bf16.h>
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#include <cuda_runtime.h>
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#include <cstdint>
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__forceinline__ __device__ int get_lane_id() {
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int lane_id;
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asm("mov.s32 %0, %laneid;" : "=r"(lane_id));
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return lane_id;
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}
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int ceil_div(int a, int b) {
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return (a + b - 1) / b;
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}
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__device__ __forceinline__ void st_na_global_v1(const int* ptr, int v) {
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asm volatile("st.global.L1::no_allocate.s32 [%0], %1;" ::"l"(ptr), "r"(v) : "memory");
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}
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__device__ __forceinline__ void st_na_global_v2(const int2* ptr, const int2& v) {
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asm volatile("st.global.L1::no_allocate.v2.s32 [%0], {%1, %2};" ::"l"(ptr), "r"(v.x), "r"(v.y) : "memory");
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}
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__device__ __forceinline__ void st_na_global_v4(const int4* ptr, const int4& v) {
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asm volatile(
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"st.global.L1::no_allocate.v4.s32 [%0], {%1, %2, %3, %4};" ::"l"(ptr), "r"(v.x), "r"(v.y), "r"(v.z), "r"(v.w)
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: "memory");
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}
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__device__ __forceinline__ int ld_na_global_v1(const int* ptr) {
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int r;
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#ifdef USE_L2_HINT
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asm volatile("ld.global.nc.L1::no_allocate.L2::128B.s32 %0, [%1];" : "=r"(r) : "l"(ptr));
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#else
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asm volatile("ld.global.nc.L1::no_allocate.s32 %0, [%1];" : "=r"(r) : "l"(ptr));
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#endif
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return r;
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}
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__device__ __forceinline__ int2 ld_na_global_v2(const int2* ptr) {
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int2 r;
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#ifdef USE_L2_HINT
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asm volatile("ld.global.nc.L1::no_allocate.L2::128B.v2.s32 {%0, %1}, [%2];" : "=r"(r.x), "=r"(r.y) : "l"(ptr));
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#else
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asm volatile("ld.global.nc.L1::no_allocate.v2.s32 {%0, %1}, [%2];" : "=r"(r.x), "=r"(r.y) : "l"(ptr));
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#endif
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return r;
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}
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__device__ __forceinline__ int4 ld_na_global_v4(const int4* ptr) {
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int4 r;
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#ifdef USE_L2_HINT
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asm volatile("ld.global.nc.L1::no_allocate.L2::128B.v4.s32 {%0, %1, %2, %3}, [%4];"
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: "=r"(r.x), "=r"(r.y), "=r"(r.z), "=r"(r.w)
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: "l"(ptr));
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#else
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asm volatile("ld.global.nc.L1::no_allocate.v4.s32 {%0, %1, %2, %3}, [%4];"
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: "=r"(r.x), "=r"(r.y), "=r"(r.z), "=r"(r.w)
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: "l"(ptr));
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#endif
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return r;
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}
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__device__ __forceinline__ void prefetch_L2(const void* p) {
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#if defined(ENABLE_L2_PREFETCH)
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asm volatile("prefetch.global.L2 [%0];" ::"l"(p));
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#endif
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}
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