Add CUTLASS FP8 Blockscale MoE kernel for Hopper architecture (#7278)
Co-authored-by: HydraQYH <QYH820@Outlook.com> Co-authored-by: TianQiLin666666 <1834987979@qq.com>
This commit is contained in:
245
sgl-kernel/csrc/moe/fp8_blockwise_moe_kernel.cu
Executable file → Normal file
245
sgl-kernel/csrc/moe/fp8_blockwise_moe_kernel.cu
Executable file → Normal file
@@ -30,6 +30,126 @@
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using namespace cute;
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using ProblemShape = cutlass::gemm::GroupProblemShape<Shape<int, int, int>>;
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template <typename OutType, typename ScheduleConfig, typename LayoutD>
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void launch_sm90_fp8_blockwise_scaled_group_mm(
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torch::Tensor& out_ptrs,
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const torch::Tensor& a_ptrs,
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const torch::Tensor& b_ptrs,
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const torch::Tensor& a_scales_ptrs,
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const torch::Tensor& b_scales_ptrs,
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const torch::Tensor& stride_a,
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const torch::Tensor& stride_b,
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const torch::Tensor& stride_c,
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const torch::Tensor& layout_sfa,
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const torch::Tensor& layout_sfb,
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const torch::Tensor& problem_sizes,
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const torch::Tensor& expert_offsets,
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const torch::Tensor& workspace) {
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using ElementA = cutlass::float_e4m3_t;
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using ElementB = cutlass::float_e4m3_t;
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using ElementC = void;
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using ElementD = OutType;
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using ElementAccumulator = float;
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using LayoutA = cutlass::layout::RowMajor;
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using LayoutB = cutlass::layout::ColumnMajor;
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using LayoutC = LayoutD;
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static constexpr int AlignmentA = 128 / cutlass::sizeof_bits<ElementA>::value;
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static constexpr int AlignmentB = 128 / cutlass::sizeof_bits<ElementB>::value;
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static constexpr int AlignmentC = 128 / cutlass::sizeof_bits<ElementD>::value;
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using ArchTag = cutlass::arch::Sm90;
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using OperatorClass = cutlass::arch::OpClassTensorOp;
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using FusionOperation = cutlass::epilogue::fusion::LinearCombination<ElementD, ElementAccumulator>;
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using CollectiveEpilogue = typename cutlass::epilogue::collective::CollectiveBuilder<
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ArchTag,
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OperatorClass,
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typename ScheduleConfig::MmaTileShape,
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typename ScheduleConfig::ClusterShape,
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cutlass::epilogue::collective::EpilogueTileAuto,
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ElementAccumulator,
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ElementAccumulator,
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ElementC, // Use void to avoid load Matrix C
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LayoutC*,
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AlignmentC,
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ElementD,
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LayoutC*,
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AlignmentC,
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typename ScheduleConfig::EpilogueSchedule,
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FusionOperation>::CollectiveOp;
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using CollectiveMainloop = typename cutlass::gemm::collective::CollectiveBuilder<
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ArchTag,
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OperatorClass,
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ElementA,
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cute::tuple<LayoutA*, typename ScheduleConfig::LayoutSFA*>,
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AlignmentA,
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ElementB,
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cute::tuple<LayoutB*, typename ScheduleConfig::LayoutSFB*>,
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AlignmentB,
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ElementAccumulator,
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typename ScheduleConfig::MmaTileShape,
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typename ScheduleConfig::ClusterShape,
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cutlass::gemm::collective::StageCountAutoCarveout<static_cast<int>(
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sizeof(typename CollectiveEpilogue::SharedStorage))>,
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typename ScheduleConfig::KernelSchedule>::CollectiveOp;
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using GemmKernel = cutlass::gemm::kernel::GemmUniversal<ProblemShape, CollectiveMainloop, CollectiveEpilogue, void>;
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using Gemm = cutlass::gemm::device::GemmUniversalAdapter<GemmKernel>;
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using UnderlyingProblemShape = ProblemShape::UnderlyingProblemShape;
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using StrideA = typename Gemm::GemmKernel::InternalStrideA;
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using StrideB = typename Gemm::GemmKernel::InternalStrideB;
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using StrideC = typename Gemm::GemmKernel::InternalStrideC;
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using StrideD = typename Gemm::GemmKernel::InternalStrideD;
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int num_experts = (int)expert_offsets.size(0);
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Gemm gemm_op;
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typename GemmKernel::MainloopArguments mainloop_args{
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static_cast<const ElementA**>(a_ptrs.data_ptr()),
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static_cast<StrideA*>(stride_a.data_ptr()),
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static_cast<const ElementB**>(b_ptrs.data_ptr()),
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static_cast<StrideB*>(stride_b.data_ptr()),
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static_cast<const ElementAccumulator**>(a_scales_ptrs.data_ptr()),
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reinterpret_cast<typename ScheduleConfig::LayoutSFA*>(layout_sfa.data_ptr()),
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static_cast<const ElementAccumulator**>(b_scales_ptrs.data_ptr()),
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reinterpret_cast<typename ScheduleConfig::LayoutSFB*>(layout_sfb.data_ptr())};
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cutlass::KernelHardwareInfo hw_info;
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hw_info.device_id = c10::cuda::current_device();
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hw_info.sm_count = at::cuda::getCurrentDeviceProperties()->multiProcessorCount;
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typename GemmKernel::EpilogueArguments epilogue_args{
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{},
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nullptr,
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static_cast<StrideC*>(stride_c.data_ptr()),
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static_cast<ElementD**>(out_ptrs.data_ptr()),
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static_cast<StrideC*>(stride_c.data_ptr())};
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UnderlyingProblemShape* problem_sizes_as_shapes = static_cast<UnderlyingProblemShape*>(problem_sizes.data_ptr());
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typename GemmKernel::Arguments args{
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cutlass::gemm::GemmUniversalMode::kGrouped,
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{num_experts, problem_sizes_as_shapes, nullptr},
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mainloop_args,
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epilogue_args,
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hw_info};
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at::cuda::CUDAGuard device_guard{(char)a_ptrs.get_device()};
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const cudaStream_t stream = at::cuda::getCurrentCUDAStream(a_ptrs.get_device());
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auto can_implement_status = gemm_op.can_implement(args);
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TORCH_CHECK(can_implement_status == cutlass::Status::kSuccess, "Failed to implement GEMM");
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auto status = gemm_op.initialize(args, workspace.data_ptr(), stream);
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TORCH_CHECK(status == cutlass::Status::kSuccess, "Failed to initialize GEMM");
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status = gemm_op.run(stream);
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TORCH_CHECK(status == cutlass::Status::kSuccess, "Failed to run GEMM");
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}
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template <typename OutType, typename ScheduleConfig, typename LayoutD>
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void launch_sm100_fp8_blockwise_scaled_group_mm(
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torch::Tensor& out_ptrs,
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@@ -312,6 +432,74 @@ void sm100_fp8_blockwise_group_mm_dispatch_shape(
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}
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}
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template <typename OutType>
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void sm90_fp8_blockwise_group_mm_dispatch_shape(
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torch::Tensor& output,
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torch::Tensor& a_ptrs,
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torch::Tensor& b_ptrs,
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torch::Tensor& out_ptrs,
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torch::Tensor& a_scales_ptrs,
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torch::Tensor& b_scales_ptrs,
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const torch::Tensor& a,
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const torch::Tensor& b,
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const torch::Tensor& scales_a,
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const torch::Tensor& scales_b,
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const torch::Tensor& stride_a,
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const torch::Tensor& stride_b,
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const torch::Tensor& stride_c,
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const torch::Tensor& layout_sfa,
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const torch::Tensor& layout_sfb,
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const torch::Tensor& problem_sizes,
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const torch::Tensor& expert_offsets,
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const torch::Tensor& workspace) {
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struct MmaConfig {
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using ElementA = cutlass::float_e4m3_t;
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using MmaTileShape = Shape<_64, _128, _128>;
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using ClusterShape = Shape<_2, _1, _1>;
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using KernelSchedule = cutlass::gemm::KernelPtrArrayTmaWarpSpecializedPingpongFP8BlockScaledAccum;
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using EpilogueSchedule = cutlass::epilogue::PtrArrayTmaWarpSpecializedPingpong;
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using ScaleConfig = cutlass::detail::Sm90BlockwiseScaleConfig<1, 128, 128>;
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using LayoutSFA = decltype(ScaleConfig::deduce_layoutSFA());
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using LayoutSFB = decltype(ScaleConfig::deduce_layoutSFB());
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};
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int num_experts = (int)expert_offsets.size(0);
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torch::TensorOptions options_int = torch::TensorOptions().dtype(torch::kInt64).device(a.device());
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torch::Tensor problem_sizes_transpose = torch::empty(num_experts * 3, options_int);
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run_get_group_gemm_starts<MmaConfig::LayoutSFA, MmaConfig::LayoutSFB, MmaConfig::ScaleConfig>(
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expert_offsets,
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a_ptrs,
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b_ptrs,
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out_ptrs,
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a_scales_ptrs,
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b_scales_ptrs,
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a,
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b,
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output,
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scales_a,
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scales_b,
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layout_sfa,
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layout_sfb,
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problem_sizes,
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problem_sizes_transpose);
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launch_sm90_fp8_blockwise_scaled_group_mm<OutType, MmaConfig, cutlass::layout::RowMajor>(
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out_ptrs,
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a_ptrs,
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b_ptrs,
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a_scales_ptrs,
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b_scales_ptrs,
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stride_a,
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stride_b,
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stride_c,
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layout_sfa,
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layout_sfb,
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problem_sizes,
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expert_offsets,
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workspace);
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}
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/**
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* @brief Performs blockwise grouped matrix multiplication on FP8 quantized inputs,
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* with per-block scaling.
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@@ -397,11 +585,6 @@ void fp8_blockwise_scaled_grouped_mm(
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TORCH_CHECK(out_ptrs.dim() == 1, "out_ptrs must be 1D tensor");
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TORCH_CHECK(a_scales_ptrs.dim() == 1, "a_scales_ptrs must be 1D tensor");
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TORCH_CHECK(b_scales_ptrs.dim() == 1, "b_scales_ptrs must be 1D tensor");
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TORCH_CHECK(problem_sizes.dim() == 2, "problem_sizes must be 2D tensor");
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TORCH_CHECK(problem_sizes.size(1) == 3, "problem_sizes must have shape (num_experts, 3)");
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TORCH_CHECK(
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problem_sizes.size(0) == expert_offsets.size(0), "Number of experts in problem_sizes must match expert_offsets");
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TORCH_CHECK(problem_sizes.dtype() == torch::kInt32, "problem_sizes must be int32");
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TORCH_CHECK(expert_offsets.dim() == 1, "expert_offsets must be 1D tensor");
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TORCH_CHECK(workspace.dim() == 1, "workspace must be 1D tensor");
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@@ -455,7 +638,57 @@ void fp8_blockwise_scaled_grouped_mm(
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can_implement = true;
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}
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#endif
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#endif
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#if defined(CUTLASS_ARCH_MMA_SM90_SUPPORTED) && defined(CUTLASS_ARCH_MMA_MODIFIABLE_TMA_SM90_SUPPORTED)
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if (sm_version == 90 && a.size(1) > 256) {
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if (output.scalar_type() == torch::kBFloat16) {
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sm90_fp8_blockwise_group_mm_dispatch_shape<cutlass::bfloat16_t>(
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output,
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a_ptrs,
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b_ptrs,
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out_ptrs,
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a_scales_ptrs,
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b_scales_ptrs,
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a,
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b,
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scales_a,
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scales_b,
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stride_a,
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stride_b,
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stride_c,
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layout_sfa,
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layout_sfb,
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problem_sizes,
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expert_offsets,
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workspace);
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} else {
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sm90_fp8_blockwise_group_mm_dispatch_shape<cutlass::half_t>(
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output,
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a_ptrs,
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b_ptrs,
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out_ptrs,
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a_scales_ptrs,
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b_scales_ptrs,
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a,
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b,
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scales_a,
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scales_b,
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stride_a,
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stride_b,
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stride_c,
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layout_sfa,
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layout_sfb,
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problem_sizes,
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expert_offsets,
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workspace);
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}
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can_implement = true;
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}
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#endif
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TORCH_CHECK_NOT_IMPLEMENTED(
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can_implement, "No implemented fp8_blockwise_scaled_mm for current compute capability: ", sm_version);
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can_implement,
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"No implemented fp8_blockwise_scaled_mm for current compute capability or K size: ",
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sm_version,
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a.size(1));
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}
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