169 lines
8.5 KiB
C
169 lines
8.5 KiB
C
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/**
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* Copyright (c) 2025 Huawei Technologies Co., Ltd.
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* This program is free software, you can redistribute it and/or modify it under the terms and conditions of
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* CANN Open Software License Agreement Version 2.0 (the "License").
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* Please refer to the License for details. You may not use this file except in compliance with the License.
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
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* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
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* See LICENSE in the root of the software repository for the full text of the License.
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*/
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/*!
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* \file gm_to_l1_iterator.h
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* \brief
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*/
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#ifndef GM_TO_L1_ITERATOR_H
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#define GM_TO_L1_ITERATOR_H
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#include "iterator.h"
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constexpr uint32_t STRIDE_LIMIT_H = 65536;
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// Partial specialization for V220, ND_in, ND_out
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template <ArchType ArchTag, typename DataType>
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struct gm_to_l1<ArchTag, DataType, DataFormatT::ND, DataFormatT::ND> {
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using HardwareParams = HardwareInfo<ArchTag>;
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static constexpr uint32_t BLOCK_SIZE = HardwareParams::l1l0BlockSize / sizeof(DataType);
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__aicore__ gm_to_l1(AscendC::LocalTensor<DataType> l1Tensor,
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AscendC::GlobalTensor<DataType> gmTensor,
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uint32_t nTileActual,
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uint32_t nTileCeil,
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uint32_t nVal,
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uint32_t dTileActual,
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uint32_t dTileCeil,
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uint32_t dVal)
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{
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AscendC::DataCopy(l1Tensor,
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gmTensor,
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AscendC::DataCopyParams(1, // nBurst
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CeilDiv<BLOCK_SIZE>(nTileActual * dTileActual), // lenBurst
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0, // srcGap
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0)); // dstGap
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};
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};
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// Partial specialization for NZ_in, NZ_out
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template <ArchType ArchTag, typename DataType>
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struct gm_to_l1<ArchTag, DataType, DataFormatT::NZ, DataFormatT::NZ> {
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using HardwareParams = HardwareInfo<ArchTag>;
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static constexpr uint32_t BLOCK_SIZE = HardwareParams::l1l0BlockSize / sizeof(DataType);
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__aicore__ gm_to_l1(AscendC::LocalTensor<DataType> l1Tensor,
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AscendC::GlobalTensor<DataType> gmTensor,
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uint32_t nTileActual,
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uint32_t nTileCeil,
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uint32_t nVal,
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uint32_t dTileActual,
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uint32_t dTileCeil,
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uint32_t dVal)
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{
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uint64_t srcStride = nTileCeil - nTileActual;
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if (srcStride < STRIDE_LIMIT_H) {
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AscendC::DataCopy(l1Tensor, gmTensor,
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AscendC::DataCopyParams(dTileActual / BLOCK_SIZE, // nBurst
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nTileActual, // lenBurst
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nTileCeil - nTileActual, // srcGap
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0)); // dstGap
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} else {
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for (uint64_t i = 0; i < dTileActual / BLOCK_SIZE; i++) {
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uint64_t dstOffset = i * nTileActual * BLOCK_SIZE;
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uint64_t srcOffset = i * nTileCeil * BLOCK_SIZE;
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AscendC::DataCopy(l1Tensor[dstOffset], gmTensor[srcOffset],
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AscendC::DataCopyParams(1, // nBurst
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nTileActual, // lenBurst
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0, // srcGap
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0)); // dstGap
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}
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}
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};
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};
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// Partial specialization for V220, ND_in, ND_out
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template <ArchType ArchTag, typename DataType>
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struct gm_to_l1<ArchTag, DataType, DataFormatT::ND, DataFormatT::NZ> {
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using HardwareParams = HardwareInfo<ArchTag>;
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static constexpr uint32_t BLOCK_SIZE = HardwareParams::l1l0BlockSize / sizeof(DataType);
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__aicore__ gm_to_l1(AscendC::LocalTensor<DataType> l1Tensor,
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AscendC::GlobalTensor<DataType> gmTensor,
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uint32_t nTileActual,
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uint32_t nTileCeil,
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uint32_t nVal,
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uint32_t dTileActual,
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uint32_t dTileCeil,
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uint32_t dVal)
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{
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if (dVal < STRIDE_LIMIT_H) {
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AscendC::DataCopy(l1Tensor,
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gmTensor,
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AscendC::Nd2NzParams(1, // ndNum
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nTileActual, // nValue
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dTileActual, // dValue
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0, // srcNdMatrixStride, unused
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dVal, // srcDValue
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nTileCeil, // dstNzC0Stride
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1, // dstNzNStride
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0)); // dstNzMatrixStride, unused
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} else {
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for (uint32_t i = 0; i < nTileActual; i++) {
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AscendC::DataCopy(l1Tensor[i * BLOCK_SIZE],
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gmTensor[i * dVal],
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AscendC::Nd2NzParams(1, // ndNum
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1, // nValue
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dTileActual, // dValue
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0, // srcNdMatrixStride, unused
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0, // srcDValue
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nTileCeil, // dstNzC0Stride
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0, // dstNzNStride
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0)); // dstNzMatrixStride, unused
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}
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}
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};
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};
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// Partial specialization for V220, ND_in, NZ_out
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template <ArchType ArchTag, typename DataType>
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struct gm_to_l1<ArchTag, DataType, DataFormatT::ND, DataFormatT::ZN> {
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using HardwareParams = HardwareInfo<ArchTag>;
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static constexpr uint32_t BLOCK_SIZE = HardwareParams::l1l0BlockSize / sizeof(DataType);
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__aicore__ gm_to_l1(AscendC::LocalTensor<DataType> l1Tensor,
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AscendC::GlobalTensor<DataType> gmTensor,
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uint32_t nTileActual,
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uint32_t nTileCeil,
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uint32_t nVal,
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uint32_t dTileActual,
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uint32_t dTileCeil,
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uint32_t dVal)
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{
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if (dVal < STRIDE_LIMIT_H) {
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AscendC::DataCopy(l1Tensor,
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gmTensor,
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AscendC::Nd2NzParams(1, // ndNum
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nTileActual, // nValue
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dTileActual, // dValue
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0, // srcNdMatrixStride, unused
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dVal, // srcDValue
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nTileCeil, // dstNzC0Stride
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1, // dstNzNStride
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0)); // dstNzMatrixStride, unused
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} else {
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for (uint32_t i = 0; i < nTileActual; ++i) {
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AscendC::DataCopy(l1Tensor,
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gmTensor,
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AscendC::Nd2NzParams(1, // ndNum
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1, // nValue
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dTileActual, // dValue
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0, // srcNdMatrixStride, unused
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0, // srcDValue
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nTileCeil, // dstNzC0Stride
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0, // dstNzNStride
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0)); // dstNzMatrixStride, unused
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}
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}
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};
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};
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#endif // GM_TO_L1_ITERATOR_H
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