vulkan: support mixed/deepseekR1 FA head sizes (#14509)
* vulkan: better parameterize FA by head sizes * vulkan: support mixed/deepseekR1 FA head sizes
This commit is contained in:
@@ -11,7 +11,8 @@
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#include "types.comp"
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#include "flash_attn_base.comp"
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const uint32_t D_per_thread = D / D_split;
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const uint32_t HSK_per_thread = HSK / D_split;
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const uint32_t HSV_per_thread = HSV / D_split;
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const uint32_t cols_per_iter = WorkGroupSize / D_split;
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const uint32_t cols_per_thread = Bc / cols_per_iter;
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@@ -29,7 +30,7 @@ layout (binding = 3) readonly buffer M {float16_t data_m[];};
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// Rows index by Q's dimension 2, and the first N rows are valid.
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D_TYPE perElemOpGqaStore(const in uint32_t r, const in uint32_t c, const in D_TYPE elem, const in uint32_t o_offset, const in uint32_t iq2, const in uint32_t N)
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{
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uint32_t offset = (iq2 + r) * D + c;
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uint32_t offset = (iq2 + r) * HSV + c;
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data_o[o_offset + offset] = D_TYPE(elem);
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return elem;
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}
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@@ -38,7 +39,7 @@ shared FLOAT_TYPE tmpsh[WorkGroupSize];
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shared vec4 tmpshv4[WorkGroupSize];
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shared float masksh[Bc][Br];
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shared vec4 Qf[Br][D / 4];
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shared vec4 Qf[Br][HSK / 4];
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void main() {
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#ifdef NEEDS_INIT_IQ_SHMEM
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@@ -53,18 +54,18 @@ void main() {
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uint32_t q_offset = (iq2*p.nb02+iq3*p.nb03) / 4;
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[[unroll]] for (uint32_t idx = 0; idx < Br * D / 4; idx += gl_WorkGroupSize.x) {
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uint32_t d = (idx + tid) % (D / 4);
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uint32_t r = (idx + tid) / (D / 4);
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if (r < Br && d < D / 4 &&
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[[unroll]] for (uint32_t idx = 0; idx < Br * HSK / 4; idx += gl_WorkGroupSize.x) {
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uint32_t d = (idx + tid) % (HSK / 4);
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uint32_t r = (idx + tid) / (HSK / 4);
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if (r < Br && d < HSK / 4 &&
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i * Br + r < N) {
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Qf[r][d] = vec4(data_qv4[q_offset / 4 + (i * Br + r) * q_stride / 4 + d]) * p.scale;
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}
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}
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barrier();
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vec4 Of[Br][D_per_thread / 4];
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[[unroll]] for (uint32_t d = 0; d < D_per_thread / 4; ++d) {
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vec4 Of[Br][HSV_per_thread / 4];
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[[unroll]] for (uint32_t d = 0; d < HSV_per_thread / 4; ++d) {
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[[unroll]] for (uint32_t r = 0; r < Br; ++r) {
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Of[r][d] = vec4(0.0);
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}
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@@ -116,7 +117,7 @@ void main() {
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[[unroll]] for (uint32_t c = 0; c < cols_per_thread; ++c) {
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[[unroll]] for (uint32_t d = 0; d < D_per_thread / 4; ++d) {
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[[unroll]] for (uint32_t d = 0; d < HSK_per_thread / 4; ++d) {
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#if BLOCK_SIZE > 1
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uint coord = (j * Bc + c * cols_per_iter + col_tid) * k_stride * BLOCK_SIZE + 4 * (d * D_split + d_tid);
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uint ib = coord / BLOCK_SIZE;
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@@ -195,14 +196,14 @@ void main() {
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Lf[r] = eMf[r]*Lf[r] + rowsumf[r];
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}
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[[unroll]] for (uint32_t d = 0; d < D_per_thread / 4; ++d) {
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[[unroll]] for (uint32_t d = 0; d < HSV_per_thread / 4; ++d) {
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[[unroll]] for (uint32_t r = 0; r < Br; ++r) {
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Of[r][d] = eMf[r] * Of[r][d];
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}
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}
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[[unroll]] for (uint32_t c = 0; c < cols_per_thread; ++c) {
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[[unroll]] for (uint32_t d = 0; d < D_per_thread / 4; ++d) {
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[[unroll]] for (uint32_t d = 0; d < HSV_per_thread / 4; ++d) {
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#if BLOCK_SIZE > 1
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uint coord = (j * Bc + c * cols_per_iter + col_tid) * v_stride * BLOCK_SIZE + 4 * (d * D_split + d_tid);
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uint ib = coord / BLOCK_SIZE;
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@@ -259,7 +260,7 @@ void main() {
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Lf[r] = tmpsh[d_tid];
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barrier();
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[[unroll]] for (uint32_t d = 0; d < D_per_thread / 4; ++d) {
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[[unroll]] for (uint32_t d = 0; d < HSV_per_thread / 4; ++d) {
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Of[r][d] = eMf * Of[r][d];
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tmpshv4[tid] = Of[r][d];
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@@ -281,11 +282,11 @@ void main() {
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// If there is split_k, then the split_k resolve shader does the final
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// division by L. Store the intermediate O value and per-row m and L values.
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if (p.k_num > 1) {
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uint32_t o_offset = D * p.ne1 * (split_k_index + iq3 * p.k_num);
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uint32_t o_offset = HSV * p.ne1 * (split_k_index + iq3 * p.k_num);
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[[unroll]] for (uint32_t r = 0; r < Br; ++r) {
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if (r < N) {
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[[unroll]] for (uint32_t d = 0; d < D_per_thread / 4; ++d) {
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[[unroll]] for (uint32_t d = 0; d < HSV_per_thread / 4; ++d) {
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[[unroll]] for (uint32_t comp = 0; comp < 4; ++comp) {
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perElemOpGqaStore(r, 4*(d * D_split + d_tid) + comp, Of[r][d][comp], o_offset, iq2, N);
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}
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@@ -293,7 +294,7 @@ void main() {
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}
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}
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o_offset = D * p.ne1 * p.ne3 * p.k_num + p.ne1 * (split_k_index + iq3 * p.k_num) * 2;
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o_offset = HSV * p.ne1 * p.ne3 * p.k_num + p.ne1 * (split_k_index + iq3 * p.k_num) * 2;
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[[unroll]] for (uint32_t r = 0; r < Br; ++r) {
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if (r < N) {
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perElemOpStoreCol0(r, 0u, ACC_TYPE(Lf[r]), o_offset, iq2, N);
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@@ -309,18 +310,18 @@ void main() {
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Lfrcp[r] = 1.0 / Lf[r];
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}
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[[unroll]] for (uint32_t d = 0; d < D_per_thread / 4; ++d) {
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[[unroll]] for (uint32_t d = 0; d < HSV_per_thread / 4; ++d) {
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[[unroll]] for (uint32_t r = 0; r < Br; ++r) {
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Of[r][d] *= Lfrcp[r];
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}
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}
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uint32_t o_offset = iq3*p.ne2*p.ne1*D;
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uint32_t o_offset = iq3*p.ne2*p.ne1*HSV;
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if (p.gqa_ratio > 1) {
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[[unroll]] for (uint32_t r = 0; r < Br; ++r) {
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if (r < N) {
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[[unroll]] for (uint32_t d = 0; d < D_per_thread / 4; ++d) {
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[[unroll]] for (uint32_t d = 0; d < HSV_per_thread / 4; ++d) {
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[[unroll]] for (uint32_t comp = 0; comp < 4; ++comp) {
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perElemOpGqaStore(r, 4*(d * D_split + d_tid) + comp, Of[r][d][comp], o_offset, iq2, N);
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}
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@@ -330,9 +331,9 @@ void main() {
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} else {
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[[unroll]] for (uint32_t r = 0; r < Br; ++r) {
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if (i * Br + r < N) {
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[[unroll]] for (uint32_t d = 0; d < D_per_thread / 4; ++d) {
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[[unroll]] for (uint32_t d = 0; d < HSV_per_thread / 4; ++d) {
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[[unroll]] for (uint32_t comp = 0; comp < 4; ++comp) {
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data_o[o_offset + iq2 * D + (i * Br + r) * p.ne1 * D + 4*(d * D_split + d_tid) + comp] = D_TYPE(Of[r][d][comp]);
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data_o[o_offset + iq2 * HSV + (i * Br + r) * p.ne1 * HSV + 4*(d * D_split + d_tid) + comp] = D_TYPE(Of[r][d][comp]);
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}
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}
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}
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@@ -4,10 +4,10 @@ layout(local_size_x_id = 0, local_size_y = 1, local_size_z = 1) in;
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layout (constant_id = 0) const uint32_t WorkGroupSize = 128;
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layout (constant_id = 1) const uint32_t Br = 1;
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layout (constant_id = 2) const uint32_t Bc = 32;
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layout (constant_id = 3) const uint32_t D = 32;
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layout (constant_id = 4) const uint32_t Clamp = 0;
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layout (constant_id = 5) const uint32_t D_split = 16;
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layout (constant_id = 3) const uint32_t HSK = 32;
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layout (constant_id = 4) const uint32_t HSV = 32;
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layout (constant_id = 5) const uint32_t Clamp = 0;
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layout (constant_id = 6) const uint32_t D_split = 16;
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layout (push_constant) uniform parameter {
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uint32_t N;
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@@ -13,7 +13,9 @@
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#include "types.comp"
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#include "flash_attn_base.comp"
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const uint32_t D_per_thread = D / D_split;
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const uint32_t HSK_per_thread = HSK / D_split;
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const uint32_t HSV_per_thread = HSV / D_split;
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const uint32_t row_split = 4;
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const uint32_t rows_per_thread = Br / row_split;
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const uint32_t cols_per_iter = gl_WorkGroupSize.x / D_split / row_split;
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@@ -32,7 +34,7 @@ layout (binding = 3) readonly buffer M {float16_t data_m[];};
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// Rows index by Q's dimension 2, and the first N rows are valid.
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D_TYPE perElemOpGqaStore(const in uint32_t r, const in uint32_t c, const in D_TYPE elem, const in uint32_t o_offset, const in uint32_t iq2, const in uint32_t N)
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{
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uint32_t offset = (iq2 + r) * D + c;
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uint32_t offset = (iq2 + r) * HSV + c;
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data_o[o_offset + offset] = D_TYPE(elem);
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return elem;
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}
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@@ -44,14 +46,14 @@ const uint32_t MatBc = 16;
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shared FLOAT_TYPE tmpsh[gl_WorkGroupSize.x];
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shared ACC_TYPEV4 tmpshv4[gl_WorkGroupSize.x];
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const uint32_t qstride = D / 4 + 2; // in units of f16vec4
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const uint32_t qstride = HSK / 4 + 2; // in units of f16vec4
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shared f16vec4 Qf[Br * qstride];
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// Avoid padding for D==256 to make it fit in 48KB shmem.
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const uint32_t sfshstride = (D <= 128) ? (Br + 8) : Br;
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// Avoid padding for hsk==256 to make it fit in 48KB shmem.
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const uint32_t sfshstride = (HSK <= 128) ? (Br + 8) : Br;
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shared ACC_TYPE sfsh[Bc * sfshstride];
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const uint32_t kshstride = D / 4 + 2; // in units of f16vec4
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const uint32_t kshstride = HSK / 4 + 2; // in units of f16vec4
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shared f16vec4 ksh[Bc * kshstride];
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shared float slope[Br];
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@@ -74,18 +76,18 @@ void main() {
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uint32_t q_offset = (iq2*p.nb02+iq3*p.nb03) / 4;
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[[unroll]] for (uint32_t idx = 0; idx < Br * D / 4; idx += gl_WorkGroupSize.x) {
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uint32_t d = (idx + tid) % (D / 4);
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uint32_t r = (idx + tid) / (D / 4);
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if (r < Br && d < D / 4 &&
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[[unroll]] for (uint32_t idx = 0; idx < Br * HSK / 4; idx += gl_WorkGroupSize.x) {
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uint32_t d = (idx + tid) % (HSK / 4);
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uint32_t r = (idx + tid) / (HSK / 4);
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if (r < Br && d < HSK / 4 &&
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i * Br + r < N) {
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Qf[r * qstride + d] = f16vec4(data_qv4[q_offset / 4 + (i * Br + r) * q_stride / 4 + d] * p.scale);
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}
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}
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barrier();
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ACC_TYPEV4 Of[rows_per_thread][D_per_thread / 4];
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[[unroll]] for (uint32_t d = 0; d < D_per_thread / 4; ++d) {
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ACC_TYPEV4 Of[rows_per_thread][HSV_per_thread / 4];
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[[unroll]] for (uint32_t d = 0; d < HSV_per_thread / 4; ++d) {
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[[unroll]] for (uint32_t r = 0; r < rows_per_thread; ++r) {
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Of[r][d] = ACC_TYPEV4(0.0);
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}
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@@ -131,10 +133,10 @@ void main() {
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[[dont_unroll]]
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for (uint32_t j = start_j; j < end_j; ++j) {
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[[unroll]] for (uint32_t idx = 0; idx < Bc * D / 4; idx += gl_WorkGroupSize.x) {
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uint32_t d = (idx + tid) % (D / 4);
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uint32_t c = (idx + tid) / (D / 4);
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if (c < Bc && d < D / 4) {
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[[unroll]] for (uint32_t idx = 0; idx < Bc * HSK / 4; idx += gl_WorkGroupSize.x) {
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uint32_t d = (idx + tid) % (HSK / 4);
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uint32_t c = (idx + tid) / (HSK / 4);
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if (c < Bc && d < HSK / 4) {
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#if BLOCK_SIZE > 1
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uint coord = (j * Bc + c) * k_stride * BLOCK_SIZE + 4 * d;
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uint ib = coord / BLOCK_SIZE;
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@@ -149,14 +151,14 @@ void main() {
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}
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barrier();
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// K * Q^T -> S^T: Bc x D * D x Br -> Bc x Br
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// Bc split across workgroup (four subgroups), loop over D in chunks of 16: 16 x 16 * 16 x 16 -> 16 x 16
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// K * Q^T -> S^T: Bc x HSK * HSK x Br -> Bc x Br
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// Bc split across workgroup (four subgroups), loop over HSK in chunks of 16: 16 x 16 * 16 x 16 -> 16 x 16
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// This is written transposed in order to allow for N being 8 if implementations need it
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coopmat<ACC_TYPE, gl_ScopeSubgroup, MatBc, MatBr, gl_MatrixUseAccumulator> SfMat = coopmat<ACC_TYPE, gl_ScopeSubgroup, MatBc, MatBr, gl_MatrixUseAccumulator>(0);
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coopmat<float16_t, gl_ScopeSubgroup, MatBc, 16, gl_MatrixUseA> KMat;
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coopmat<float16_t, gl_ScopeSubgroup, 16, MatBr, gl_MatrixUseB> QMat;
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for (uint32_t d = 0; d < D / 16; ++d) {
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for (uint32_t d = 0; d < HSK / 16; ++d) {
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coopMatLoad(QMat, Qf, d * 16 / 4, qstride, gl_CooperativeMatrixLayoutColumnMajor);
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uint coord = (gl_SubgroupID * MatBc) * kshstride + d * 16 / 4;
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@@ -206,7 +208,7 @@ void main() {
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eMf[r] = exp(Moldf - Mf[r]);
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}
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[[unroll]] for (uint32_t d = 0; d < D_per_thread / 4; ++d) {
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[[unroll]] for (uint32_t d = 0; d < HSV_per_thread / 4; ++d) {
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[[unroll]] for (uint32_t r = 0; r < rows_per_thread; ++r) {
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Of[r][d] = float16_t(eMf[r]) * Of[r][d];
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}
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@@ -221,7 +223,7 @@ void main() {
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Pf[r] = exp(sfsh[tile_row(r) + (c * cols_per_iter + col_tid) * sfshstride] - Mf[r]);
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Lf[r] += Pf[r];
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}
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[[unroll]] for (uint32_t d = 0; d < D_per_thread / 4; ++d) {
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[[unroll]] for (uint32_t d = 0; d < HSV_per_thread / 4; ++d) {
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#if BLOCK_SIZE > 1
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uint coord = (j * Bc + c * cols_per_iter + col_tid) * v_stride * BLOCK_SIZE + 4 * (d * D_split + d_tid);
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uint ib = coord / BLOCK_SIZE;
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@@ -284,7 +286,7 @@ void main() {
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}
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[[unroll]] for (uint32_t r = 0; r < rows_per_thread; ++r) {
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[[unroll]] for (uint32_t d = 0; d < D_per_thread / 4; ++d) {
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[[unroll]] for (uint32_t d = 0; d < HSV_per_thread / 4; ++d) {
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Of[r][d] = float16_t(eMf[r]) * Of[r][d];
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tmpshv4[tid] = Of[r][d];
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@@ -304,11 +306,11 @@ void main() {
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// If there is split_k, then the split_k resolve shader does the final
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// division by L. Store the intermediate O value and per-row m and L values.
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if (p.k_num > 1) {
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uint32_t o_offset = D * p.ne1 * (split_k_index + iq3 * p.k_num);
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uint32_t o_offset = HSV * p.ne1 * (split_k_index + iq3 * p.k_num);
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[[unroll]] for (uint32_t r = 0; r < rows_per_thread; ++r) {
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if (tile_row(r) < N) {
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[[unroll]] for (uint32_t d = 0; d < D_per_thread / 4; ++d) {
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[[unroll]] for (uint32_t d = 0; d < HSV_per_thread / 4; ++d) {
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[[unroll]] for (uint32_t comp = 0; comp < 4; ++comp) {
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perElemOpGqaStore(tile_row(r), 4*(d * D_split + d_tid) + comp, float(Of[r][d][comp]), o_offset, iq2, N);
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}
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@@ -316,7 +318,7 @@ void main() {
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}
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}
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o_offset = D * p.ne1 * p.ne3 * p.k_num + p.ne1 * (split_k_index + iq3 * p.k_num) * 2;
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o_offset = HSV * p.ne1 * p.ne3 * p.k_num + p.ne1 * (split_k_index + iq3 * p.k_num) * 2;
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[[unroll]] for (uint32_t r = 0; r < rows_per_thread; ++r) {
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if (tile_row(r) < N) {
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perElemOpStoreCol0(tile_row(r), 0u, ACC_TYPE(Lf[r]), o_offset, iq2, N);
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@@ -332,18 +334,18 @@ void main() {
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Lfrcp[r] = 1.0 / Lf[r];
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}
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[[unroll]] for (uint32_t d = 0; d < D_per_thread / 4; ++d) {
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[[unroll]] for (uint32_t d = 0; d < HSV_per_thread / 4; ++d) {
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[[unroll]] for (uint32_t r = 0; r < rows_per_thread; ++r) {
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Of[r][d] *= float16_t(Lfrcp[r]);
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}
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}
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uint32_t o_offset = iq3*p.ne2*p.ne1*D;
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uint32_t o_offset = iq3*p.ne2*p.ne1*HSV;
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if (p.gqa_ratio > 1) {
|
||||
[[unroll]] for (uint32_t r = 0; r < rows_per_thread; ++r) {
|
||||
if (tile_row(r) < N) {
|
||||
[[unroll]] for (uint32_t d = 0; d < D_per_thread / 4; ++d) {
|
||||
[[unroll]] for (uint32_t d = 0; d < HSV_per_thread / 4; ++d) {
|
||||
[[unroll]] for (uint32_t comp = 0; comp < 4; ++comp) {
|
||||
perElemOpGqaStore(tile_row(r), 4*(d * D_split + d_tid) + comp, float(Of[r][d][comp]), o_offset, iq2, N);
|
||||
}
|
||||
@@ -353,9 +355,9 @@ void main() {
|
||||
} else {
|
||||
[[unroll]] for (uint32_t r = 0; r < rows_per_thread; ++r) {
|
||||
if (i * Br + tile_row(r) < N) {
|
||||
[[unroll]] for (uint32_t d = 0; d < D_per_thread / 4; ++d) {
|
||||
[[unroll]] for (uint32_t d = 0; d < HSV_per_thread / 4; ++d) {
|
||||
[[unroll]] for (uint32_t comp = 0; comp < 4; ++comp) {
|
||||
data_o[o_offset + iq2 * D + (i * Br + tile_row(r)) * p.ne1 * D + 4*(d * D_split + d_tid) + comp] = D_TYPE(Of[r][d][comp]);
|
||||
data_o[o_offset + iq2 * HSV + (i * Br + tile_row(r)) * p.ne1 * HSV + 4*(d * D_split + d_tid) + comp] = D_TYPE(Of[r][d][comp]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@@ -61,8 +61,8 @@ ACC_TYPE Max(const in uint32_t row, const in uint32_t col, const in ACC_TYPE ele
|
||||
// Rows index by Q's dimension 2, and the first N rows are valid.
|
||||
D_TYPE perElemOpGqaStore(const in uint32_t r, const in uint32_t c, const in D_TYPE elem, const in uint32_t o_offset, const in uint32_t iq2, const in uint32_t N)
|
||||
{
|
||||
if (r < N && c < D) {
|
||||
uint32_t offset = (iq2 + r) * D + c;
|
||||
if (r < N && c < HSV) {
|
||||
uint32_t offset = (iq2 + r) * HSV + c;
|
||||
data_o[o_offset + offset] = D_TYPE(elem);
|
||||
}
|
||||
return elem;
|
||||
@@ -86,9 +86,9 @@ void main() {
|
||||
tensorLayoutV = setTensorLayoutBlockSizeNV(tensorLayoutV, 1, BLOCK_SIZE);
|
||||
#endif
|
||||
|
||||
tensorLayoutQ = setTensorLayoutDimensionNV(tensorLayoutQ, N, D);
|
||||
tensorLayoutK = setTensorLayoutDimensionNV(tensorLayoutK, KV, D);
|
||||
tensorLayoutV = setTensorLayoutDimensionNV(tensorLayoutV, KV, D);
|
||||
tensorLayoutQ = setTensorLayoutDimensionNV(tensorLayoutQ, N, HSK);
|
||||
tensorLayoutK = setTensorLayoutDimensionNV(tensorLayoutK, KV, HSK);
|
||||
tensorLayoutV = setTensorLayoutDimensionNV(tensorLayoutV, KV, HSV);
|
||||
|
||||
// hint to the compiler that strides are aligned for the aligned variant of the shader
|
||||
if (Clamp != gl_CooperativeMatrixClampModeConstantNV)
|
||||
@@ -104,16 +104,16 @@ void main() {
|
||||
tensorLayoutK = setTensorLayoutStrideNV(tensorLayoutK, k_stride, 1);
|
||||
tensorLayoutV = setTensorLayoutStrideNV(tensorLayoutV, v_stride, 1);
|
||||
|
||||
coopmat<Q_TYPE, gl_ScopeWorkgroup, Br, D, gl_MatrixUseAccumulator> Q;
|
||||
coopmat<float16_t, gl_ScopeWorkgroup, Br, D, gl_MatrixUseA> Qf16;
|
||||
coopmat<Q_TYPE, gl_ScopeWorkgroup, Br, HSK, gl_MatrixUseAccumulator> Q;
|
||||
coopmat<float16_t, gl_ScopeWorkgroup, Br, HSK, gl_MatrixUseA> Qf16;
|
||||
|
||||
uint32_t q_offset = iq2*p.nb02+iq3*p.nb03;
|
||||
coopMatLoadTensorNV(Q, data_q, q_offset, sliceTensorLayoutNV(tensorLayoutQ, i * Br, Br, 0, D));
|
||||
coopMatLoadTensorNV(Q, data_q, q_offset, sliceTensorLayoutNV(tensorLayoutQ, i * Br, Br, 0, HSK));
|
||||
|
||||
Qf16 = coopmat<float16_t, gl_ScopeWorkgroup, Br, D, gl_MatrixUseA>(Q);
|
||||
Qf16 = coopmat<float16_t, gl_ScopeWorkgroup, Br, HSK, gl_MatrixUseA>(Q);
|
||||
Qf16 *= float16_t(p.scale);
|
||||
|
||||
coopmat<ACC_TYPE, gl_ScopeWorkgroup, Br, D, gl_MatrixUseAccumulator> O = coopmat<ACC_TYPE, gl_ScopeWorkgroup, Br, D, gl_MatrixUseAccumulator>(0);
|
||||
coopmat<ACC_TYPE, gl_ScopeWorkgroup, Br, HSV, gl_MatrixUseAccumulator> O = coopmat<ACC_TYPE, gl_ScopeWorkgroup, Br, HSV, gl_MatrixUseAccumulator>(0);
|
||||
|
||||
coopmat<ACC_TYPE, gl_ScopeWorkgroup, Br, Bc, gl_MatrixUseAccumulator> L, M;
|
||||
|
||||
@@ -140,10 +140,10 @@ void main() {
|
||||
|
||||
coopmat<ACC_TYPE, gl_ScopeWorkgroup, Br, Bc, gl_MatrixUseAccumulator> S = coopmat<ACC_TYPE, gl_ScopeWorkgroup, Br, Bc, gl_MatrixUseAccumulator>(0);
|
||||
|
||||
coopmat<float16_t, gl_ScopeWorkgroup, D, Bc, gl_MatrixUseB> K_T;
|
||||
coopmat<float16_t, gl_ScopeWorkgroup, HSK, Bc, gl_MatrixUseB> K_T;
|
||||
|
||||
uint32_t k_offset = ik2*p.nb12 + ik3*p.nb13;
|
||||
coopMatLoadTensorNV(K_T, data_k, k_offset, sliceTensorLayoutNV(tensorLayoutK, j * Bc, Bc, 0, D), tensorViewTranspose DECODEFUNC);
|
||||
coopMatLoadTensorNV(K_T, data_k, k_offset, sliceTensorLayoutNV(tensorLayoutK, j * Bc, Bc, 0, HSK), tensorViewTranspose DECODEFUNC);
|
||||
S = coopMatMulAdd(Qf16, K_T, S);
|
||||
|
||||
if (p.logit_softcap != 0.0f) {
|
||||
@@ -208,42 +208,42 @@ void main() {
|
||||
rowsum = coopmat<ACC_TYPE, gl_ScopeWorkgroup, Br, Bc, gl_MatrixUseAccumulator>(0.0);
|
||||
rowsum = coopMatMulAdd(P_A, One, rowsum);
|
||||
|
||||
coopmat<float16_t, gl_ScopeWorkgroup, Bc, D, gl_MatrixUseB> V;
|
||||
coopmat<float16_t, gl_ScopeWorkgroup, Bc, HSV, gl_MatrixUseB> V;
|
||||
uint32_t v_offset = iv2*p.nb22 + iv3*p.nb23;
|
||||
coopMatLoadTensorNV(V, data_v, v_offset, sliceTensorLayoutNV(tensorLayoutV, j * Bc, Bc, 0, D) DECODEFUNC);
|
||||
coopMatLoadTensorNV(V, data_v, v_offset, sliceTensorLayoutNV(tensorLayoutV, j * Bc, Bc, 0, HSV) DECODEFUNC);
|
||||
|
||||
L = eM*L + rowsum;
|
||||
|
||||
// This is the "diagonal" matrix in the paper, but since we do componentwise
|
||||
// multiply rather than matrix multiply it has the diagonal element smeared
|
||||
// across the row
|
||||
coopmat<ACC_TYPE, gl_ScopeWorkgroup, Br, D, gl_MatrixUseAccumulator> eMdiag;
|
||||
coopmat<ACC_TYPE, gl_ScopeWorkgroup, Br, HSV, gl_MatrixUseAccumulator> eMdiag;
|
||||
|
||||
// resize eM by using smear/reduce
|
||||
coopMatReduceNV(eMdiag, eM, gl_CooperativeMatrixReduceRowNV, smearReduce);
|
||||
|
||||
// multiply with fp16 accumulation, then add to O.
|
||||
coopmat<float16_t, gl_ScopeWorkgroup, Br, D, gl_MatrixUseAccumulator> PV = coopmat<float16_t, gl_ScopeWorkgroup, Br, D, gl_MatrixUseAccumulator>(0);
|
||||
coopmat<float16_t, gl_ScopeWorkgroup, Br, HSV, gl_MatrixUseAccumulator> PV = coopmat<float16_t, gl_ScopeWorkgroup, Br, HSV, gl_MatrixUseAccumulator>(0);
|
||||
PV = coopMatMulAdd(P_A, V, PV);
|
||||
|
||||
O = eMdiag * O + coopmat<ACC_TYPE, gl_ScopeWorkgroup, Br, D, gl_MatrixUseAccumulator>(PV);
|
||||
O = eMdiag * O + coopmat<ACC_TYPE, gl_ScopeWorkgroup, Br, HSV, gl_MatrixUseAccumulator>(PV);
|
||||
}
|
||||
|
||||
// If there is split_k, then the split_k resolve shader does the final
|
||||
// division by L. Store the intermediate O value and per-row m and L values.
|
||||
if (p.k_num > 1) {
|
||||
coopmat<D_TYPE, gl_ScopeWorkgroup, Br, D, gl_MatrixUseAccumulator> O_D = coopmat<D_TYPE, gl_ScopeWorkgroup, Br, D, gl_MatrixUseAccumulator>(O);
|
||||
coopmat<D_TYPE, gl_ScopeWorkgroup, Br, HSV, gl_MatrixUseAccumulator> O_D = coopmat<D_TYPE, gl_ScopeWorkgroup, Br, HSV, gl_MatrixUseAccumulator>(O);
|
||||
|
||||
uint32_t o_offset = D * p.ne1 * (split_k_index + iq3 * p.k_num);
|
||||
uint32_t o_offset = HSV * p.ne1 * (split_k_index + iq3 * p.k_num);
|
||||
coopMatPerElementNV(O_D, O_D, perElemOpGqaStore, o_offset, iq2, N);
|
||||
|
||||
o_offset = D * p.ne1 * p.ne3 * p.k_num + p.ne1 * (split_k_index + iq3 * p.k_num) * 2;
|
||||
o_offset = HSV * p.ne1 * p.ne3 * p.k_num + p.ne1 * (split_k_index + iq3 * p.k_num) * 2;
|
||||
coopMatPerElementNV(L, L, perElemOpStoreCol0, o_offset, iq2, N);
|
||||
coopMatPerElementNV(M, M, perElemOpStoreCol0, o_offset + p.ne1, iq2, N);
|
||||
return;
|
||||
}
|
||||
|
||||
coopmat<ACC_TYPE, gl_ScopeWorkgroup, Br, D, gl_MatrixUseAccumulator> Ldiag;
|
||||
coopmat<ACC_TYPE, gl_ScopeWorkgroup, Br, HSV, gl_MatrixUseAccumulator> Ldiag;
|
||||
|
||||
// resize L by using smear/reduce
|
||||
coopMatReduceNV(Ldiag, L, gl_CooperativeMatrixReduceRowNV, smearReduce);
|
||||
@@ -255,18 +255,18 @@ void main() {
|
||||
|
||||
O = Ldiag*O;
|
||||
|
||||
uint32_t o_offset = iq3*p.ne2*p.ne1*D;
|
||||
uint32_t o_offset = iq3*p.ne2*p.ne1*HSV;
|
||||
|
||||
coopmat<D_TYPE, gl_ScopeWorkgroup, Br, D, gl_MatrixUseAccumulator> O_D = coopmat<D_TYPE, gl_ScopeWorkgroup, Br, D, gl_MatrixUseAccumulator>(O);
|
||||
coopmat<D_TYPE, gl_ScopeWorkgroup, Br, HSV, gl_MatrixUseAccumulator> O_D = coopmat<D_TYPE, gl_ScopeWorkgroup, Br, HSV, gl_MatrixUseAccumulator>(O);
|
||||
if (p.gqa_ratio > 1) {
|
||||
coopMatPerElementNV(O_D, O_D, perElemOpGqaStore, o_offset, iq2, N);
|
||||
} else {
|
||||
tensorLayoutNV<3, gl_CooperativeMatrixClampModeConstantNV> tensorLayoutD = createTensorLayoutNV(3, gl_CooperativeMatrixClampModeConstantNV);
|
||||
tensorLayoutD = setTensorLayoutDimensionNV(tensorLayoutD, p.ne2, p.ne1, D);
|
||||
tensorLayoutD = setTensorLayoutDimensionNV(tensorLayoutD, p.ne2, p.ne1, HSV);
|
||||
|
||||
// permute dimensions
|
||||
tensorViewNV<3, false, 1, 0, 2> tensorViewPermute = createTensorViewNV(3, false, 1, 0, 2);
|
||||
|
||||
coopMatStoreTensorNV(O_D, data_o, o_offset, sliceTensorLayoutNV(tensorLayoutD, i * Br, Br, iq2, N, 0, D), tensorViewPermute);
|
||||
coopMatStoreTensorNV(O_D, data_o, o_offset, sliceTensorLayoutNV(tensorLayoutD, i * Br, Br, iq2, N, 0, HSV), tensorViewPermute);
|
||||
}
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user