enginex-ascend-910-llama.cpp/ggml-cuda/template-instances/fattn-vec-f32-instance-hs128-q8_0-q4_1.cu

// This file has been autogenerated by generate_cu_files.py, do not edit manually.

#include "../fattn-vec-f32.cuh"

DECL_FATTN_VEC_F32_CASE(128, GGML_TYPE_Q8_0, GGML_TYPE_Q4_1);
CUDA: refactor mmq, dmmv, mmvq (#7716) * CUDA: refactor mmq, dmmv, mmvq * fix out-of-bounds write * struct for qk, qr, qi * fix cmake build * mmq_type_traits 2024-06-05 16:53:00 +02:00			`// This file has been autogenerated by generate_cu_files.py, do not edit manually.`
CUDA: quantized KV support for FA vec (#7527) * CUDA: quantized KV support for FA vec * try CI fix * fix commented-out kernel variants * add q8_0 q4_0 tests * fix nwarps > batch size * split fattn compile via extern templates * fix flake8 * fix metal tests * fix cmake * make generate_cu_files.py executable * add autogenerated .cu files * fix AMD * error if type_v != FP16 and not flash_attn * remove obsolete code 2024-06-01 08:44:14 +02:00
			`#include "../fattn-vec-f32.cuh"`

			`DECL_FATTN_VEC_F32_CASE(128, GGML_TYPE_Q8_0, GGML_TYPE_Q4_1);`